Datasheet

ManualsBrandsMaxim ManualsIntegrated Circuits (ICs)I²C to 1-wire Interface-IC SO-8

Table Of Contents

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AVAILABLE

Functional Diagrams

Pin Configurations appear at end of data sheet.

Functional Diagrams continued at end of data sheet.

UCSP is a trademark of Maxim Integrated Products, Inc.

For pricing, delivery, and

ordering information, please contact Maxim Direct

at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.

General Description

The DS2482-100 is an I

C-to-1-Wire

bridge device

that interfaces directly to standard (100kHz max) or fast

(400kHz max) I

C masters to perform bidirectional pro-

tocol conversion between the I

C master and any

downstream 1-Wire slave devices. Relative to any

attached 1-Wire slave device, the DS2482-100 is a

1-Wire master. Internal, factory-trimmed timers relieve

the system host processor from generating time-critical

1-Wire waveforms, supporting both standard and over-

drive 1-Wire communication speeds. To optimize

1-Wire waveform generation, the DS2482-100 performs

slew-rate control on rising and falling 1-Wire edges and

provides additional programmable features to match

drive characteristics to the 1-Wire slave environment.

Programmable, strong pullup features support 1-Wire

power delivery to 1-Wire devices such as EEPROMs

and sensors. The DS2482-100 combines these features

with an output to control an external MOSFET for

enhanced strong pullup application. The I

C slave

address assignment is controlled by two binary

address inputs, resolving potential conflicts with other

C slave devices in the system.

Applications

Features

♦ I

C Host Interface Supports 100kHz and 400kHz

C Communication Speeds

♦ 1-Wire Master IO with Selectable Active or

Passive 1-Wire Pullup

♦ Provides Reset/Presence, 8-Bit, Single-Bit, and

3-Bit 1-Wire IO Sequences

♦ Standard and Overdrive 1-Wire Communication

Speeds

♦ Slew-Controlled 1-Wire Edges

♦ Strong 1-Wire Pullup Provided by an Internal Low-

Impedance Signal Path

♦ PCTLZ Output to Optionally Control an External

MOSFET for Stronger Pullup Requirements

♦ Two Address Inputs for I

C Address Assignment

♦ Operating Range: 2.9V to 5.5V, -40°C to +85°C

♦ 8-Pin (150 mils) SO and 9-Bump WLP Packages

Single-Channel 1-Wire Master

Pin Configurations appear at end of data sheet.

Printers

Medical Instruments

Industrial Sensors

Cell Phones, PDAs

Ordering Information

Denotes a lead(Pb)-free/RoHS-compliant package.

T/T&R = Tape and reel.

PART TEMP RANGE PIN-PACKAGE

DS2482S-100+ -40°C to +85°C 8 SO (150 mils)

DS2482S-100+T&R -40°C to +85°C 8 SO (150 mils)

DS2482X-100+T -40°C to +85°C 9 WLP (2.5k pieces)

Typical Operating Circuit

1-Wire is a registered trademark of Maxim Integrated Products, Inc.

DS2482-100

SDA

SCL

AD1

AD0

PCTLZ

= I

C PULLUP RESISTOR (SEE THE APPLICATIONS INFORMATION SECTION FOR R

SIZING).

CURRENT-LIMITING

RESISTOR

REFER TO APPLICATION

NOTE 4206

OPTIONAL

CIRCUITRY

1-Wire LINE

μC

C PORT)

1-Wire

DEVICE

1-Wire

DEVICE

1-Wire

DEVICE

19-4930; Rev 9; 1/12

DS2482-100

Summary of content (24 pages)

PAGE 1
DS2482-100 LE AVAILAB Single-Channel 1-Wire Master General Description The DS2482-100 is an I2C-to-1-Wire® bridge device that interfaces directly to standard (100kHz max) or fast (400kHz max) I2C masters to perform bidirectional protocol conversion between the I 2 C master and any downstream 1-Wire slave devices. Relative to any attached 1-Wire slave device, the DS2482-100 is a 1-Wire master.
PAGE 2
DS2482-100 Single-Channel 1-Wire Master ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground.........-0.5V to +6V Maximum Current into Any Pin .........................................±20mA Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-55°C to +125°C Lead Temperature (SO only; soldering, 10s)...................
PAGE 3
DS2482-100 Single-Channel 1-Wire Master ELECTRICAL CHARACTERISTICS (continued) (VCC = 2.9V to 5.5V, TA = -40°C to +85°C.) PARAMETER SYMBOL CONDITIONS Standard (3.3V to 0V) Fall Time High-to-Low (Notes 6, 7) Write-Zero Low Time tF1 tW0L Write-Zero Recovery Time tREC0 Reset Low Time tRSTL Presence-Detect Sample Time tMSP Sampling for Short and Interrupt tSI Reset High Time tRSTH MIN TYP MAX 0.54 3.0 Overdrive (3.3V to 0V) 0.10 0.59 Standard (5.0V to 0V) 0.55 2.2 Overdrive (5.
PAGE 4
DS2482-100 Single-Channel 1-Wire Master ELECTRICAL CHARACTERISTICS (continued) (VCC = 2.9V to 5.5V, TA = -40°C to +85°C.) PARAMETER Input Capacitance SCL Clock Frequency Hold Time (Repeated) START Condition (After this period, the first clock pulse is generated.) CI CONDITIONS MIN (Note 9) f SCL 0 tHD:STA 0.6 TYP MAX UNITS 10 pF 400 kHz μs Low Period of the SCL Clock tLOW 1.3 μs High Period of the SCL Clock tHIGH 0.6 μs Setup Time for a Repeated START Condition t SU:STA 0.
PAGE 5
DS2482-100 Single-Channel 1-Wire Master Pin Description PIN SO WLP 1 B3 NAME VCC FUNCTION Power-Supply Input 2 C3 IO 3 C2 GND Input/Output Driver for 1-Wire Line Ground Reference 4 B1 SCL I2C Serial Clock Input. Must be connected to VCC through a pullup resistor. 5 B2 SDA I2C Serial Data Input/Output. Must be connected to VCC through a pullup resistor. 6 A1 PCTLZ 7 A2 AD1 8 A3 AD0 Active-Low Control Output for an External p-Channel MOSFET.
PAGE 6
DS2482-100 Single-Channel 1-Wire Master Device Registers The DS2482-100 has three registers that the I2C host can read: Configuration, Status, and Read Data. These registers are addressed by a read pointer. The position of the read pointer, i.e., the register that the host reads in a subsequent read access, is defined by the instruction the DS2482-100 executed last. To enable certain 1-Wire features, the host has read and write access to the Configuration Register.
PAGE 7
DS2482-100 Single-Channel 1-Wire Master Strong Pullup (SPU) The SPU bit is used to activate the strong pullup function prior to a 1-Wire Write Byte or 1-Wire Single Bit command. Strong pullup is commonly used with 1-Wire EEPROM devices when copying scratchpad data to the main memory or when performing an SHA-1 computation and with parasitically powered temperature sensors or A/D converters.
PAGE 8
DS2482-100 Single-Channel 1-Wire Master Status Register Bit Assignment BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 DIR TSB SBR RST LL SD PPD 1WB Status Register The read-only Status Register is the general means for the DS2482-100 to report bit-type data from the 1-Wire side, 1-Wire busy status, and its own reset status to the host processor.
PAGE 9
DS2482-100 Single-Channel 1-Wire Master Function Commands The DS2482-100 understands eight function commands that fall into four categories: device control, I2C communication, 1-Wire setup, and 1-Wire communication. The feedback path to the host is controlled by a read pointer, which is set automatically by each function command for the host to efficiently access relevant information. The host processor sends these commands and applicable parameters as strings of one or two bytes using the I 2C interface.
PAGE 10
DS2482-100 Single-Channel 1-Wire Master Write Configuration Command Code D2h Command Parameter Configuration Byte Description Writes a new configuration byte. The new settings take effect immediately. Note: When writing to the Configuration Register, the new data is accepted only if the upper nibble (bits 7 to 4) is the one’s complement of the lower nibble (bits 3 to 0). When read, the upper nibble is always 0h. Typical Use Defining the features for subsequent 1-Wire communication.
PAGE 11
DS2482-100 Single-Channel 1-Wire Master 1-Wire Single Bit Command Code 87h Command Parameter Bit Byte Description Generates a single 1-Wire time slot with a bit value “V” as specified by the bit byte at the 1-Wire line (see Table 2). A V value of 0b generates a write-zero time slot (Figure 5); a V value of 1b generates a write-one time slot, which also functions as a read-data time slot (Figure 6). In either case, the logic level at the 1-Wire line is tested at tMSR and SBR is updated.
PAGE 12
DS2482-100 Single-Channel 1-Wire Master tWOL tMSR VCC VIH1 VIL1 0V tF1 tREC0 tSLOT PULLUP (SEE FIGURE 2) DS2482-100 PULLDOWN Figure 5. Write-Zero Time Slot tMSR tW1L VCC VIH1 VIL1 0V tF1 tSLOT PULLUP (SEE FIGURE 2) DS2482-100 PULLDOWN 1-Wire SLAVE PULLDOWN NOTE: DEPENDING ON ITS INTERNAL STATE, A 1-Wire SLAVE DEVICE TRANSMITS DATA TO ITS MASTER (e.g. THE DS2482-100). WHEN RESPONDING WITH A 0, A 1-Wire SLAVE STARTS PULLING THE LINE LOW DURING tW1L.
PAGE 13
DS2482-100 Single-Channel 1-Wire Master 1-Wire Write Byte Command Code A5h Command Parameter Data Byte Description Writes a single data byte to the 1-Wire line. Typical Use To write commands or data to the 1-Wire line. Equivalent to executing eight 1-Wire Single Bit commands, but faster due to less I2C traffic. Restriction 1-Wire activity must have ended before the DS2482-100 can process this command.
PAGE 14
DS2482-100 Single-Channel 1-Wire Master 1-Wire Triplet Command Code 78h Command Parameter Direction Byte Description Generates three time slots: two read time slots and one write time slot at the 1-Wire line. The type of write time slot depends on the result of the read time slots and the direction byte. The direction byte determines the type of write time slot if both read time slots are 0 (a typical case).
PAGE 15
DS2482-100 Single-Channel 1-Wire Master MSB FIRST MSB LSB MSB LSB SDA SLAVE ADDRESS SCL 1–7 IDLE START CONDITION R/W 8 ACK 9 DATA 1–7 ACK 8 DATA 9 ACK/ NACK 1–7 8 9 REPEATED IF MORE BYTES ARE TRANSFERRED STOP CONDITION REPEATED START Figure 7. I2C Protocol Overview I2C Interface transmitted first. After each byte follows an acknowledge bit to allow synchronization between master and slave.
PAGE 16
DS2482-100 Single-Channel 1-Wire Master SDA tBUF tF tSP tHD:STA tLOW SCL tHIGH tHD:STA tHD:DAT STOP tSU:STA tR SPIKE SUPPRESSION tSU:STO tSU:DAT START REPEATED START NOTE: TIMING IS REFERENCED TO VIL(MAX) AND VIH(MIN). Figure 9. I2C Timing Diagram I2C Definitions The following terminology is commonly used to describe I2C data transfers. The timing references are defined in Figure 9. Bus Idle or Not Busy: Both SDA and SCL are inactive and in their logic-high states.
PAGE 17
DS2482-100 Single-Channel 1-Wire Master some time later the slave may refuse to accept data, possibly because of an invalid command code or parameter. In this case, the slave device does not acknowledge any of the bytes that it refuses and leaves SDA high. In either case, after a slave has failed to acknowledge, the master first should generate a repeated START condition or a STOP condition followed by a START condition to begin a new data transfer.
PAGE 18
DS2482-100 Single-Channel 1-Wire Master I2C Communication Examples (continued) Device Reset (After Power-Up) S AD,0 A DRST A Sr AD,1 A A\ P Activities that are underlined denote an optional read access to verify the success of the command. Set Read Pointer (To Read from Another Register) Case A: Valid Read Pointer Code S AD,0 A SRP A C3h A P C3h is the valid read pointer code for the Configuration Register. Case B: Invalid Read Pointer Code S AD,0 A SRP A E5h A\ P E5h is an
PAGE 19
DS2482-100 Single-Channel 1-Wire Master I2C Communication Examples (continued) 1-Wire Single Bit (To Generate a Single Time Slot on the 1-Wire Line) Case A: 1-Wire Idle (1WB = 0), No Busy Polling S AD,0 A 1WSB A A P (Idle) S AD,1 A A\ P The idle time is needed for the 1-Wire function to complete. Then access the device in read mode to get the result from the 1-Wire Single Bit command.
PAGE 20
DS2482-100 Single-Channel 1-Wire Master I2C Communication Examples (continued) 1-Wire Read Byte (To Read a Byte from the 1-Wire Line) Case A: 1-Wire Idle (1WB = 0), No Busy Polling, Set Read Pointer After Idle Time S AD,0 A 1WRB A P (Idle) S AD,0 A SRP A E1h A Sr AD,1 A A\ P The idle time is needed for the 1-Wire function to complete.
PAGE 21
DS2482-100 Single-Channel 1-Wire Master I2C Communication Examples (continued) 1-Wire Triplet (To Perform a Search ROM Function on the 1-Wire Line) Case A: 1-Wire Idle (1WB = 0), No Busy Polling S AD,0 A 1WT A A P (Idle) S AD,1 A A\ P The idle time is needed for the 1-Wire function to complete. Then access the device in read mode to get the result from the 1-Wire Triplet command.
PAGE 22
DS2482-100 Single-Channel 1-Wire Master reduced bus capacitance of 300pF is acceptable for pullup voltages of 4V and lower. For fast speed operation at any pullup voltage, the bus capacitance must not exceed 200pF. The corresponding pullup resistor value at the voltage is indicated by the “MINIMUM RP” line.
PAGE 23
DS2482-100 Single-Channel 1-Wire Master Pin Configurations TOP VIEW (BUMP SIDE DOWN) TOP MARK DS2482-100 1 TOP VIEW 2 DS2482-100 3 1 + + A VCC 1 8 AD0 IO 2 7 AD1 AD1 AD0 2 4 8 2 1 B DS2482-100 3 6 PCTLZ SCL 4 5 SDA 3 A PCTLZ GND 2 + B SCL SDA VCC # # # x x C C GND SO (150 mils) y y w w r r IO WLP WLP Package Information For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages.
PAGE 24
DS2482-100 Single-Channel 1-Wire Master Revision History REVISION NUMBER REVISION DATE 1 080604 2 110204 DESCRIPTION Initial release — I2C trademark note deleted; upper I2C slave address bits changed from 01100b to 00110b. 3 040507 Added the lead(Pb)-free ordering information. 4 091007 Added the UCSP (WLP) package and Package Information section. 5 6 061208 7/08 7 8/08 8 11/09 9 1/12 PAGES CHANGED 1, 14 1 1, 21 Updated the Features bullets.