Specifications

4.3. RF CIRCUITS

4.3.1. PLL SYNTHESIZER

12.8 MHz TCXO

The TCXO contains the 3-stage thermistor network compensation and crystal oscillator and

modulation ports. Its compensation is ±5 PPM or less from -30c to +60c.

PLL IC DUAL MODULE PRESCALER

Input frequency of 12.8 MHz to pin 1 of IC2 MB15A02 (or MB15E03SL) is divided into 6.25 kHz

or 5 kHz by the reference counter and then supplied to the comparator. RF signal input from the

VCO is divided to 1/64 at the 64/65 modulus prescaler in IC2, divided by A and N counter in IC2

to determine frequency steps, and then supplied to the comparator. PLL comparison frequency

is 6.25/5 kHz, so its minimum programmable frequency step is 6.25/5 kHz. The A and N counter

is programmed to obtain the desired frequency by serial data in the CPU. In the comparator, the

phase difference between reference and VCO signal is compared. When the phase of the

reference frequency is leading, ΦP is the output, but when the VCO frequency is leading, ΦR is

the output. When ΦP= ΦR, phase detector out is a very small pulse.

EXTERNAL CHARGE PUMP

This is used to increase dynamic range of VCO. Voltage range is decided by the supply voltage

of the charge pump and the DC to DC converter which supplies that voltage. 0-12v is necessary

for controlling the VCO. In addition the radio adopts a current mode charge pump to take direct

control of such parameters as charge pump voltage swing, current magnitude, TRI-STATE

leakage, and temperature compensation. ΦP, ΦR logic signals are converted into current

pulses to enable either charging or discharging of the loop filter components to control the

output frequency of the PLL.

REFERENCE FREQUENCY LPF

The Loop Filter contains R9, C1 and C2. LPF settling time is 12mS with 1 kHz frequency. This

also reduces the residual side-band noise for the best signal-to-noise ratio.