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MeiG Smart product technical information
SLM500 Hardware Design Guide Page 38
4.6.1. LCD Interface
The SLM500 module supports the MIPI interface of one LCD displays, supports dual-
screen display, and has a compatible screen identification signal. The resolution of the screen
can be up to 1440*720. The signal interface is shown in the following table. In the Layout, the
MIPI signal line should strictly control the differential 100 ohm impedance and the equal
length between the signal line group and the group.
The module's MIPI interface is a 1.2V power domain. When the user needs a compatible
screen design, the module's LCD_ID pin or ADC pin can be used. At the same time, the
module can provide 2.8V power to the LCD. The LCD interface is as follows:
Table 4.5：Primary screen interface definition
Main screen interface
MIPI_DSI0_CLK_M
52
O
MIPI_LCD clock line
MIPI_DSI0_CLK_P
53
O
MIPI_DSI0_LANE0_M
54
I/O
MIPI_LCD data line
MIPI_DSI0_LANE0_P
55
I/O
MIPI_DSI0_LANE1_M
56
I/O
MIPI_DSI0_LANE1_P
57
I/O
MIPI_DSI0_LANE3_M
60
I/O
MIPI_DSI0_LANE3_P
61
I/O
MIPI_DSI0_LANE2_M
58
I/O
MIPI_DSI0_LANE2_P
59
I/O
GPIO60_LCD_RESET_N
49
O
LCD reset pin
GPIO24_LCD_TE0
50
I/O
LCD frame sync signal
VREG_L6_1P8
125
O
1.8V power supply
VREG_L17_2P85
129
O
2.8V power supply
LCD_ID of the module, this pin is internally GPIO. When used as LCD_ID, please confirm
the internal circuit of LCD. If the internal divider of the LCD uses resistor divider, please pay
attention to the voltage to meet the high or low range of GPIO.
MIPI is a high-speed signal line. To avoid EMI interference, it is recommended to place a
common-mode inductor near the LCD side.