User Manual

MeiG_SLM550_Hardware Design Manual
MeiG Smart Technology Co., Ltd 17/89
88, 89, 120,
122, 130, 132,
135, 140, 143,
144, 149, 162,
171, 172, 176,
187~191,
202~204
206~224,
226~231
233~238, 240,
241, 243, 244,
245, 247, 248,
250, 251, 255,
256, 258, 259,
261, 266, 268,
269, 271~274
display interface (MIPI)
DSI_CLK_N 52 I/O
MIPI_LCD clock
DSI_CLK_P 53 I/O
DSI_LN0_N 54 I/O
MIPI_LCD data
DSI_LN0_P 55 I/O
DSI_LN1_N 56 I/O
DSI_LN1_P 57 I/O
DSI_LN2_N 58 I/O
DSI_LN2_P 59 I/O
DSI_LN3_N 60 I/O
DSI_LN3_P 61 I/O
GPIO82_LCD0_RESE
T
49 O LCD reset
GPIO81_LCD_TE 50 I/O LCD frame sync signal
UART(1.8V)
GPIO2_UART1_TXD 154 I UART1 data transmit
GPIO3_UART1_RXD 153 O UART1 data receive