User Manual

MeiG_SLM550_Hardware Design Manual
MeiG Smart Technology Co., Ltd 19/89
CSI0_LN3_P 200 I/O
GPIO27_SCAM_MCL
K2
75 I/O Front Camera main clock
GPIO24_SCAM_RST_
N
81 I/O Front Camera reset
GPIO26_SCAM_PWD
N
82 I/O Front Camera dormancy
Rear Camera
CSI1_CLK_N 63 I/O
Rear Camera MIPI clock
CSI1_CLK_P 64 I/O
CSI1_LN0_N 65 I/O
Rear Camera MIPI data
CSI1_LN0_P 66 I/O
CSI1_LN1_N 67 I/O
CSI1_LN1_P 68 I/O
CSI1_LN2_N 72 I/O
CSI1_LN2_P 73 I/O
CSI1_LN3_N 70 I/O
CSI1_LN3_P 71 I/O
GPIO21_MCAM_MCL
K1
74 I/O Rear Camera main clock
GPIO19_MCAM_RST
_N
79 I/O Rear Camera reset
GPIO25_MCAM_PWD
N
80 I/O Rear Camera dormancy
Audio Interface
MIC_GND 5 The main MIC negative
MIC_IN1_P 4 I The main MIC positive
MIC_IN2_P 6 I Headphone MIC positive
MIC_IN3_P 148 I Secondary MIC positive
MIC_BIAS1 147 O
The BIAS voltage of main
MIC is used in the design of
silicon wheat