Datasheet

59
AT32UC3A
Figure 12-7. SPI Master mode with (CPOL=0 and NCPHA=1) or (CPOL=1 and NCPHA=0)
Figure 12-8. SPI Slave mode with (CPOL=0 and NCPHA=1) or (CPOL=1 and NCPHA=0)
Figure 12-9. SPI Slave mode with (CPOL = NCPHA = 0) or (CPOL= NCPHA= 1)
SPCK
MISO
MOSI
SPI
5
SPI
3
SPI
4
SPCK
MISO
MOSI
SPI
6
SPI
7
SPI
8
SPCK
MISO
MOSI
SPI
9
SPI
10
SPI
11
32058KS–AVR32–01/12