Datasheet

AT32UC3A

4. SPI Bad Serial Clock Generation on 2nd chip_select when SCBR = 1, CPOL=1 and

NCPHA=0

When multiple CS are in use, if one of the baudrate equals to 1 and one of the others doesn't

equal to 1, and CPOL=1 and CPHA=0, then an aditional pulse will be generated on SCK.

Fix/workaround

When multiple CS are in use, if one of the baudrate equals 1, the other must also equal 1 if

CPOL=1 and CPHA=0.

5. SPI Glitch on RXREADY flag in slave mode when enabling the SPI or during the first

transfer

In slave mode, the SPI can generate a false RXREADY signal during enabling of the SPI or

during the first transfer.

Fix/Workaround

1. Set slave mode, set required CPOL/CPHA.

2. Enable SPI.

3. Set the polarity CPOL of the line in the opposite value of the required one.

4. Set the polarity CPOL to the required one.

5. Read the RXHOLDING register.

Transfers can now befin and RXREADY will now behave as expected.

6. SPI Disable does not work in Slave mode

Fix/workaround

Read the last received data then perform a Software reset.

15.4.4 Power Manager

1. Wrong reset causes when BOD is activated

Setting the BOD enable fuse will cause the Reset Cause Register to list BOD reset as the

reset source even though the part was reset by another source.

Fix/Workaround

Do not set the BOD enable fuse, but activate the BOD as soon as your program starts.

2. If the BOD level is higher than VDDCORE, the part is constantly under reset

If the BOD level is set to a value higher than VDDCORE and enabled by fuses, the part will

be in constant reset.

Fix/Workaround

Apply an external voltage on VDDCORE that is higher than the BOD level and is lower than

VDDCORE max and disable the BOD.

15.4.5 FLASHC

1. On AT32UC3A0512 and AT32UC3A1512, corrupted read in flash after FLASHC WP,

EP, EA, WUP, EUP commands may happen

- After a FLASHC Write Page (WP) or Erase Page (EP) command applied to a page in a

given half of the flash (first or last 256 kB of flash), reading (data read or code fetch) the

other half of the flash may fail. This may lead to an exception or to other errors derived from

this corrupted read access.

- After a FLASHC Erase All (EA) command, reading (data read or code fetch) the flash may

fail. This may lead to an exception or to other errors derived from this corrupted read access.

- After a FLASHC Write User Page (WUP) or Erase User Page (EUP) command, reading

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