Datasheet

25
AT32UC3A
10.2 CPU Local Bus Mapping
Some of the registers in the GPIO module are mapped onto the CPU local bus, in addition to
being mapped on the Peripheral Bus. These registers can therefore be reached both by
accesses on the Peripheral Bus, and by accesses on the local bus.
Mapping these registers on the local bus allows cycle-deterministic toggling of GPIO pins since
the CPU and GPIO are the only modules connected to this bus. Also, since the local bus runs at
CPU speed, one write or read operation can be performed per clock cycle to the local bus-
mapped GPIO registers.
0xFFFF1C00
USART2
Universal Synchronous Asynchronous Receiver
Transmitter - USART2
PBA
0xFFFF2000
USART3
Universal Synchronous Asynchronous Receiver
Transmitter - USART3
PBA
0xFFFF2400
SPI0 Serial Peripheral Interface - SPI0 PBA
0xFFFF2800
SPI1 Serial Peripheral Interface - SPI1 PBA
0xFFFF2C00
TWI Two Wire Interface - TWI PBA
0xFFFF3000
PWM Pulse Width Modulation Controller - PWM PBA
0xFFFF3400
SSC Synchronous Serial Controller - SSC PBA
0xFFFF3800
TC Timer/Counter - TC PBA
0xFFFF3C00
ADC Analog To Digital Converter - ADC PBA
Table 10-1. Peripheral Address Mapping (Continued)
Address Peripheral Name Bus
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