Datasheet

74
32072SH–AVR32–10/2012
AT32UC3A3
10. Errata
10.1 Rev. H
10.1.1 General
Devices with Date Code lower than 1233 cannot operate with CPU frequency higher
than 66MHz in 1WS and 36MHz in 0WS in the whole temperature range
Fix/Workaround
None
DMACA data transfer fails when CTLx.SRC_TR_WIDTH is not equal to
CTLx.DST_TR_WIDTH
Fix/Workaround
For any DMACA transfer make sure CTLx.SRC_TR_WIDTH = CTLx.DST_TR_WIDTH.
10.1.2 Processor and Architecture
LDM instruction with PC in the register list and without ++ increments Rp
For LDM with PC in the register list:
the instruction behaves as if the ++ field is always set, ie
the pointer is always updated. This happens even if the ++ field is cleared. Specifically, the
increment of the pointer is done in parallel with the testing of R12.
Fix/Workaround
None.
Hardware breakpoints may corrupt MAC results
Hardware breakpoints on MAC instructions may corrupt the destination register of the MAC
instruction.
Fix/Workaround
Place breakpoints on earlier or later instructions.
When the main clock is RCSYS, TIMER_CLOCK5 is equal to PBA clock
When the main clock is generated from RCSYS, TIMER_CLOCK5 is equal to PBA Clock
and not PBA Clock / 128.
Fix/Workaround
None.
10.1.3 MPU
Privilege violation when using interrupts in application mode with protected system
stack
If the system stack is protected by the MPU and an interrupt occurs in application mode, an
MPU DTLB exception will occur.
Fix/Workaround
Make a DTLB Protection (Write) exception handler which permits the interrupt request to be
handled in privileged mode.
10.1.4 USB
UPCFGn.INTFRQ is irrelevant for isochronous pipe
As a consequence, isochronous IN and OUT tokens are sent every 1ms (Full Speed), or
every 125uS (High Speed).
Fix/Workaround