Datasheet

ATBTLC1000 Hardware Design Guidelines – Ultra Low Power BLE 4.1 SoC [USER GUIDE]
Atmel-42537B-ATBTLC1000-Hardware-Design-Guidelines_UserGuide_102015
6
6
Figure 2-1. ATBTLC1000 XO Connections to Low Frequency Crystal Oscillator
(a) Crystal Oscillator is used (b) Crystal Oscillator is bypassed
Table 2-1. ATBTLC1000 32.768kHz External Clock Specification
Parameter
Min.
Typ.
Max.
Unit
Comments
Oscillation frequency
32.768
KHz
Must be able to drive 6pF load @ desired fre-
quency
VinH
0.7
1.2
V
High level input voltage
VinL
0
0.2
V
Low level input voltage
Stability – Temperature
-250
+250
ppm
Note that the maximum voltage into the RTC_CLK pin is 1.2V. If the clock source provides a larger swing
than this, it must be reduced before being introduced into the RTC_CLK pin. This can be accomplished
with a simple resistor divider. Figure 2-2 shows an example of a resistor divider used to reduce the
voltage of an external clock. However, note that the resistor divider will consume current. For example, if
the clock swing into the resistor divider circuit in Figure 2-2 is 3.3V, the circuit will consume approximately
5.5µA of additional current, so this trade-off should be taken into consideration.
Figure 2-2. Resistor Divider Example for an External RTC