Specifications

dsPIC33F/PIC24H Family Reference Manual
DS70323E-page 43-34 © 2008-2012 Microchip Technology Inc.
Figure 43-2: High-Speed PWM Module Register Interconnection Diagram
MUX
PTMRx
PDCx
PWMCONx
TRGCONx
PTCON, PTCON2
IOCONx
DTRx
PWMxL
PWMxH
FLTx or
PWM1L
PWM1H
FCLCONx
MDC
PHASEx
LEBCONx
MUX
STMRx
SDCx
SPHASEx
ALTDTRx
PWMCAPx
User Override Logic
Current-Limit
PWM Output Mode
Control Logic
Logic
Pin
Control
Logic
Fault and
Current-Limit
Logic
PWM Generator 1
FLTx or
PWM Generator 2 through PWM Generator 9
Interrupt
Logic
ADC Trigger
Module Control and Timing
Master Duty Cycle Register
Synchronization
Synchronization
Master PeriodMaster Period
Master Duty CycleMaster Duty Cycle
Secondary PWM
SYNCI2
SYNCI1
SYNCO1
SEVTCMP
Comparator
Special Event Trigger
Special Event
Postscaler
PTPER
PMTMR
Primary Master Time Base
Primary Master Time Base Counter
Special Event Compare Trigger
Comparator
Clock
Prescaler
Comparator
Comparator
Comparator
16-Bit Data Bus
Dead-Time
TRIGx
Fault Override Logic
Override Logic
SYNCO2
SSEVTCMP
Comparator
Secondary
Secondary Special
Event Postscaler
STPER
SMTMR
Secondary Master Time Base
Secondary Master Time Base Counter
Secondary Special Event
Comparator
Clock
Prescaler
DTCMPx
SYNCI4
SYNCI3
SYNCI2
SYNCI1
SYNCI4
SYNCI3
Special Event
Compare Trigger
Trigger
Analog
Comparator
Analog
Comparator
DTCMPx