Datasheet

ENC28J60
DS39662E-page 16 .  2006-2012 Microchip Technology Inc.
3.1.2 ECON2 REGISTER
The ECON2 register, shown in Register 3-2, is used to
control other main functions of the ENC28J60.
REGISTER 3-2: ECON2: ETHERNET CONTROL REGISTER 2
R/W-1 R/W-0
(1)
R/W-0 R/W-0 R/W-0 U-0 U-0 U-0
AUTOINC PKTDEC PWRSV
rVRPS— — —
bit 7 bit 0
Legend: r = Reserved bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 AUTOINC: Automatic Buffer Pointer Increment Enable bit
1 = Automatically increment ERDPT or EWRPT on reading from or writing to EDATA
0 = Do not automatically change ERDPT and EWRPT after the buffer is accessed
bit 6 PKTDEC: Packet Decrement bit
(1)
1 = Decrement the EPKTCNT register by one
0 = Leave EPKTCNT unchanged
bit 5 PWRSV: Power Save Enable bit
1 = MAC, PHY and control logic are in Low-Power Sleep mode
0 = Normal operation
bit 4 Reserved: Maintain as ‘0’
bit 3 VRPS: Voltage Regulator Power Save Enable bit
When PWRSV = 1:
1 = Internal voltage regulator is in Low-Current mode
0 = Internal voltage regulator is in Normal Current mode
When PWRSV = 0:
The bit is ignored; the regulator always outputs as much current as the device requires.
bit 2-0 Unimplemented: Read as ‘0’
Note 1: This bit is automatically cleared once it is set.