Datasheet

 2006-2012 Microchip Technology Inc. . DS39662E-page 23

ENC28J60

U-0 U-0 U-0 R-1 R-1 U-0 U-0 U-0

— — — PFDPX PHDPX — — —

bit 15 bit 8

U-0 U-0 U-0 U-0 U-0 R/LL-0 R/LH-0 U-0

— — — — — LLSTAT JBSTAT —

bit 7 bit 0

Legend: 1 = Bit is set

R = Read-only bit 0 = Bit is cleared U = Unimplemented bit, read as ‘0’

-n = Value at POR R/LH = Read-only latch bit R/LL = Bit latches low LH = Bit latches high

bit 15-13 Unimplemented: Read as ‘0’

bit 12 PFDPX: PHY Full-Duplex Capable bit

1 = PHY is capable of operating at 10 Mbps in Full-Duplex mode (this bit is always set)

bit 11 PHDPX: PHY Half-Duplex Capable bit

1 = PHY is capable of operating at 10 Mbps in Half-Duplex mode (this bit is always set)

bit 10-3 Unimplemented: Read as ‘0’

bit 2 LLSTAT: PHY Latching Link Status bit

1 = Link is up and has been up continously since PHSTAT1 was last read

0 = Link is down or was down for a period since PHSTAT1 was last read

bit 1 JBSTAT: PHY Latching Jabber Status bit

1 = PHY has detected a transmission meeting the jabber criteria since PHSTAT1 was last read

0 = PHY has not detected any jabbering transmissions since PHSTAT1 was last read

bit 0 Unimplemented: Read as ‘0’