Datasheet

ENC28J60
DS39662E-page 24 . 2006-2012 Microchip Technology Inc.
REGISTER 3-6: PHSTAT2: PHYSICAL LAYER STATUS REGISTER 2
U-0 U-0 R-0 R-0 R-0 R-0 R-x U-0
TXSTAT RXSTAT COLSTAT LSTAT DPXSTAT
(1)
bit 15 bit 8
U-0 U-0 R-0 U-0 U-0 U-0 U-0 U-0
—PLRITY
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-14 Unimplemented: Read as ‘0
bit 13 TXSTAT: PHY Transmit Status bit
1 = PHY is transmitting data
0 = PHY is not transmitting data
bit 12 RXSTAT: PHY Receive Status bit
1 = PHY is receiving data
0 = PHY is not receiving data
bit 11 COLSTAT: PHY Collision Status bit
1 = A collision is occuring
0 = A collision is not occuring
bit 10 LSTAT: PHY Link Status bit (non-latching)
1 =Link is up
0 =Link is down
bit 9 DPXSTAT: PHY Duplex Status bit
(1)
1 = PHY is configured for full-duplex operation (PHCON1<8> is set)
0 = PHY is configured for half-duplex operation (PHCON1<8> is clear)
bit 8-6 Unimplemented: Read as ‘0
bit 5 PLRITY: Polarity Status bit
1 = The polarity of the signal on TPIN+/TPIN- is reversed
0 = The polarity of the signal on TPIN+/TPIN- is correct
bit 4-0 Unimplemented: Read as ‘0
Note 1: Reset values of the Duplex mode/status bit depends on the connection of the LED to the LEDB pin (see
Section 2.6 “LED Configuration” for additional details).