Datasheet

 2006-2012 Microchip Technology Inc. . DS39662E-page 57
ENC28J60
TABLE 10-1: SUMMARY OF REGISTERS USED WITH FLOW CONTROL
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
ECON1 TXRST
RXRST DMAST CSUMEN TXRTS RXEN BSEL1 BSEL0 13
MACON1
— — — r TXPAUS RXPAUS PASSALL MARXEN 14
MABBIPG — Back-to-Back Inter-Packet Gap (BBIPG<6:0>) 14
EFLOCON — — — — — FULDPXS FCEN1 FCEN0 14
EPAUSL Pause Timer Value Low Byte (EPAUS<7:0>) 14
EPAUSH Pause Timer Value High Byte (EPAUS<15:8>) 14
Legend: r = reserved, — = unimplemented, read as ‘0’. Shaded cells are not used.