Datasheet

 2006-2012 Microchip Technology Inc. . DS39662E-page 65
ENC28J60
REGISTER 12-2: EIE: ETHERNET INTERRUPT ENABLE REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
INTIE PKTIE DMAIE LINKIE TXIE r TXERIE RXERIE
bit 7 bit 0
Legend: r = Reserved bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 INTIE: Global INT Interrupt Enable bit
1 = Allow interrupt events to drive the INT
pin
0 = Disable all INT
pin activity (pin is continuously driven high)
bit 6 PKTIE: Receive Packet Pending Interrupt Enable bit
1 = Enable receive packet pending interrupt
0 = Disable receive packet pending interrupt
bit 5 DMAIE: DMA Interrupt Enable bit
1 = Enable DMA interrupt
0 = Disable DMA interrupt
bit 4 LINKIE: Link Status Change Interrupt Enable bit
1 = Enable link change interrupt from the PHY
0 = Disable link change interrupt
bit 3 TXIE: Transmit Enable bit
1 = Enable transmit interrupt
0 = Disable transmit interrupt
bit 2 Reserved: Maintain as ‘0’
bit 1 TXERIE: Transmit Error Interrupt Enable bit
1 = Enable transmit error interrupt
0 = Disable transmit error interrupt
bit 0 RXERIE: Receive Error Interrupt Enable bit
1 = Enable receive error interrupt
0 = Disable receive error interrupt