Datasheet

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
SMSC LAN91C111 REV C 119 Revision 1.92 (06-27-11)
DATASHEET
t22 nCYCLE Setup to LCLK Rising 5 ns
t22A nCYCLE Hold After LCLK Rising 10 ns
Figure 14.6 Burst Read Cycles - nVLBUS=1
PARAMETER MIN TYP MAX UNITS
t12 nDATACS Setup to LCLK Rising 20 ns
t12A nDATACS Hold after LCLK Rising 0 ns
t14 nRDYRTN Setup to LCLK Falling 10 ns
t15 nRDYRTN Hold after LCLK Falling 10 ns
t17 W/nR Setup to LCLK Falling 15 ns
t17A W/nR Hold After LCLK Falling 3 ns
t19 Data Delay from LCLK Rising (Read) 5 15 ns
PARAMETER MIN TYP MAX UNITS
t15
t19t19
t17A
t12A
t14t12t17
abc
Clock
nDATACS
W/nR
nCYCLE
Read Data
nRDYRTN