Datasheet

16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support
Datasheet
SMSC LAN9220 105 Revision 2.9 (03-01-12)
DATASHEET
5.4 MAC Control and Status Registers
These registers are located in the MAC module and are accessed indirectly through the MAC-CSR
synchronizer port. Table 5.6, "MAC CSR Register Map", shown below, lists the MAC registers that are
accessible through the indexing method using the MAC_CSR_CMD and MAC_CSR_DATA registers
(see sections MAC_CSR_CMD – MAC CSR Synchronizer Command Register and MAC_CSR_DATA
– MAC CSR Synchronizer Data Register).
Table 5.6 MAC CSR Register Map
MAC CONTROL AND STATUS REGISTERS
INDEX SYMBOL REGISTER NAME DEFAULT
1MAC_CR
MAC Control Register
00040000h
2 ADDRH
MAC Address High
0000FFFFh
3 ADDRL
MAC Address Low
FFFFFFFFh
4 HASHH
Multicast Hash Table High
00000000h
5 HASHL
Multicast Hash Table Low
00000000h
6MII_ACC
MII Access
00000000h
7 MII_DATA
MII Data
00000000h
8FLOW
Flow Control
00000000h
9VLAN1
VLAN1 Tag
00000000h
AVLAN2
VLAN2 Tag
00000000h
BWUFF
Wake-up Frame Filter
00000000h
CWUCSR
Wake-up Control and Status
00000000h
DCOE_CR
Checksum Offload Engine Control
00000000h