Datasheet
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
DS70000652F-page 186 2011-2014 Microchip Technology Inc.
REGISTER 15-2: PxTMR: PWMx TIMER COUNT VALUE REGISTER
R-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PTDIR PTMR<14:8>
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PTMR<7:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 PTDIR: PWMx Time Base Count Direction Status bit (read-only)
1 = PWMx time base is counting down
0 = PWMx time base is counting up
bit 14-0 PTMR <14:0>: PWMx Time Base Register Count Value bits
REGISTER 15-3: PxTPER: PWMx TIME BASE PERIOD REGISTER
U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— PTPER<14:8>
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PTPER<7:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as ‘0’
bit 14-0 PTPER<14:0>: PWMx Time Base Period Value bits