Datasheet

2011-2014 Microchip Technology Inc. DS70000652F-page 381
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
INDEX
A
Absolute Maximum Ratings ..............................................281
AC Characteristics ............................................................294
10-Bit ADC Specifications.........................................333
ADC Specifications ...................................................332
Internal Fast RC (FRC) Accuracy ..................... 296, 342
Internal Low-Power RC (LPRC) Accuracy ........ 296, 342
Load Conditions........................................................ 294
PLL Clock.................................................................. 296
Temperature and Voltage Specifications.................. 294
ADC
Control Registers ......................................................222
Helpful Tips...............................................................221
Initialization ............................................................... 217
Key Features............................................................. 217
Resources................................................................. 221
Alternate Interrupt Vector Table (AIVT) .............................. 95
Analog-to-Digital Converter (ADC)....................................217
Arithmetic Logic Unit (ALU).................................................43
B
Bit-Reversed Addressing .................................................... 76
Example......................................................................77
Implementation ...........................................................76
Sequence Table (16-Entry)......................................... 77
Block Diagrams
16-Bit Timer1 Module................................................ 165
6-Channel PWM1 Module.........................................182
ADC1 Conversion Clock Period................................ 221
ADC1 for dsPIC33FJ32(GP/MC)104 Devices .......... 220
ADC1 for dsPIC33FJXX(GP/MC)101 Devices.......... 218
ADC1 for dsPIC33FJXX(GP/MC)102 Devices.......... 219
Comparator I/O Operating Modes............................. 231
Comparator Voltage Reference ................................ 232
Connections for On-Chip Voltage Regulator.............266
CTMU Module........................................................... 256
Digital Filter Interconnect .......................................... 233
DSP Engine ................................................................44
dsPIC33FJXX(GP/MC)10X CPU Core .......................38
dsPIC33FJXX(GP/MC)10X Devices........................... 28
I
2
C Module................................................................ 204
Input Capture x Module............................................. 175
MCLR
Pin Connections............................................... 34
Multiplexing of Remappable Output for RPn............. 144
Oscillator System......................................................125
Output Compare x Module........................................177
Real-Time Clock and Calendar (RTCC) Module....... 243
Recommended Minimum Connection......................... 34
Remappable MUX Input for U1RX............................ 142
Reset System.............................................................. 87
Shared Port Structure ...............................................140
SPIx Module.............................................................. 197
Timer2 and Timer4 (16-Bit)....................................... 169
Timer2/3 and Timer4/5 (32-Bit)................................. 168
Timer3 and Timer5 (16-Bit)....................................... 169
UARTx Simplified...................................................... 211
User-Programmable Blanking Function.................... 232
Watchdog Timer (WDT)............................................267
Brown-out Reset (BOR)....................................................266
C
Charge Time Measurement Unit. See CTMU.
Clock Switching ................................................................ 132
Enabling.................................................................... 132
Sequence ................................................................. 132
Code Examples
Assembly Code for Write-Protected Register
Unlock, Fault Clearing Sequence..................... 184
C Code for Write-Protected Register Unlock,
Fault Clearing Sequence.................................. 184
Port Write/Read........................................................ 141
PWRSAV Instruction Syntax .................................... 133
Setting the RTCWREN Bit........................................ 244
Comparator....................................................................... 231
Control Registers...................................................... 234
Configuration Bits ............................................................. 261
Description................................................................ 263
CPU
Control Registers........................................................ 40
Data Addressing
Overview............................................................. 37
DSP Engine................................................................ 43
Adder/Subtracter
Overflow and Saturation............................. 45
Barrel Shifter....................................................... 47
Data Accumulators
Write Back.................................................. 46
Data Accumulators and Adder/Subtracter.......... 45
Multiplier ............................................................. 45
Overview............................................................. 37
Special MCU Features ............................................... 38
CPU Clocking System ...................................................... 126
Clock Selection......................................................... 126
Clock Sources .......................................................... 126
Configuration Bit Values for Clock Selection............ 127
PLL Configuration..................................................... 127
CTMU
Control Registers...................................................... 257
Customer Change Notification Service............................. 387
Customer Notification Service .......................................... 387
Customer Support............................................................. 387
D
Data Address Space........................................................... 52
Memory Map for dsPIC33FJ16(GP/MC)101/102
Devices, 1-Kbyte RAM ....................................... 53
Memory Map for dsPIC33FJ32(GP/MC)101/102/104
Devices, 2-Kbyte RAM ............................................ 54
Near Data Space........................................................ 52
Organization and Alignment ....................................... 52
SFR Space ................................................................. 52
Software Stack ........................................................... 73
Width .......................................................................... 52
X and Y Spaces.......................................................... 55