Datasheet
Table Of Contents
- Features
- CMOS Technology
- Packages
- Package Types
- Block Diagram
- 1.0 Device OvervieW
- 1.1 Pin Descriptions
- 1.2 Power-on Reset (POR)
- 1.3 Power-up Timer (PWRT)
- 1.4 Clock Generator
- 1.5 I2C Bus Interface/ Protocol Handler
- 1.6 Address Decoder
- 1.7 Register Block
- 1.8 Serializer/Deserializer
- 1.9 Interrupt Logic
- 2.0 Electrical Characteristics
- 2.1 DC Characteristics
- TABLE 2-1: DC Characteristics
- FIGURE 2-1: respOnse time
- TABLE 2-2: response time
- FIGURE 2-2: TEST POINT Clock Timing
- TABLE 2-3: TEST POINT Clock Timing
- TABLE 2-4: Power-up Timer Requirements
- FIGURE 2-3: I2C Bus Start/Stop Bits Timing
- FIGURE 2-4: I2C Bus Data Timing
- TABLE 2-5: I2C Bus Data Requirements
- FIGURE 2-5: GP0 and GP1 POrt Timings
- 2.1 DC Characteristics
- 3.0 Package InFormation
- Appendix A: Revision History
- Product Identification System
- Worldwide Sales and Service
© 2007 Microchip Technology Inc. DS20090C-page 11
MCP23016
1.7.6 I/O EXPANDER CONTROL
REGISTER
• IOCON0 controls the functionality of the
MCP23016.
The IARES (Interrupt Activity Resolution) bit controls
the sampling frequency of the GP port pins. The higher
the sampling frequency, the higher the device current
requirements. If this bit is ‘0’ (default), the maximum
time to detect the activity on the port is 32 ms
(max.),
which results in lower standby current. If this bit is ‘1’,
the maximum time to detect activity on the port is
200 µsec.
(max.) and results in higher standby current.
REGISTER 1-11: IOCON0 - I/0 EXPANDER CONTROL REGISTER
U-0 U-0 U-0 U-0 U-0 U-0 U-0 R/W-0
— — — — — — — IARES
bit 7 bit 0
bit 1-7 Unimplemented bit: Read as ‘0’
bit 0 IARES
: Interrupt Activity Resolution
1 = Fast sample rate
0 = Normal sample rate
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
IOCON1 is a shadow register for IOCON0. Access to IOCON1 results in access to IOCON0.