Datasheet

© 2008 Microchip Technology Inc. DS22103A-page 25
MCP23018/MCP23S18
1.6.7 PULL-UP RESISTOR
CONFIGURATION REGISTER
The GPPU register controls the pull-up resistors for the
port pins. If a bit is set the corresponding port pin is
internally pulled up with an internal resistor.
FIGURE 1-10: TYPICAL PERFORMANCE CURVE FOR THE INTERNAL PULL-UP RESISTORS
REGISTER 1-9: GPPU – GPIO PULL-UP RESISTOR REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PU7 PU6 PU5 PU4 PU3 PU2 PU1 PU0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 PU7:PU0: Controls the internal pull-up resistors on each pin (when configured as an input or output)
<7:0>.
1 = Pull-up enabled.
0 = Pull-up disabled.
GPIO Pin Internal Pull-up Current vs V
DD
0
50
100
150
200
250
300
350
400
1.522.533.544.555.5
V
DD
(V)
I
PU
(µA)
T = -40°C
T = +25°C
T = +125°C
T = +85°C