Datasheet

© 2007 Microchip Technology Inc. DS21291F-page 43
MCP2510
REGISTER 6-3: EFLG - ERROR FLAG REGISTER (ADDRESS: 2Dh)
R/W-0 R/W-0 R-0 R-0 R-0 R-0 R-0 R-0
RX1OVR RX0OVR TXBO TXEP RXEP TXWAR RXWAR EWARN
bit 7 bit 0
bit 7 RX1OVR: Receive Buffer 1 Overflow Flag
- Set when a valid message is received for RXB1 and CANINTF.RX1IF = 1
- Must be reset by MCU
bit 6 RX0OVR: Receive Buffer 0 Overflow Flag
- Set when a valid message is received for RXB0 and CANINTF.RX0IF = 1
- Must be reset by MCU
bit 5 TXBO: Bus-Off Error Flag
- Bit set when TEC reaches 255
- Reset after a successful bus recovery sequence
bit 4 TXEP: Transmit Error-Passive Flag
- Set when TEC is equal to or greater than 128
- Reset when TEC is less than 128
bit 3 RXEP: Receive Error-Passive Flag
- Set when REC is equal to or greater than 128
- Reset when REC is less than 128
bit 2 TXWAR: Transmit Error Warning Flag
- Set when TEC is equal to or greater than 96
- Reset when TEC is less than 96
bit 1 RXWAR: Receive Error Warning Flag
- Set when REC is equal to or greater than 96
- Reset when REC is less than 96
bit 0 EWARN: Error Warning Flag
- Set when TEC or REC is equal to or greater than 96 (TXWAR or RXWAR = 1)
- Reset when both REC and TEC are less than 96
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown