MCP3001 2.7V 10-Bit A/D Converter with SPI™ Serial Interface Features 10-bit resolution ±1 LSB max DNL ±1 LSB max INL On-chip sample and hold SPI™ serial interface (modes 0,0 and 1,1) Single supply operation: 2.7V - 5.5V 200 ksps sampling rate at 5V 75 ksps sampling rate at 2.
MCP3001 1.0 ELECTRICAL CHARACTERISTICS 1.1 Maximum Ratings* PIN FUNCTION TABLE Name Function VDD +2.7V to 5.5V Power Supply VSS Ground IN+ Positive Analog Input Ambient temp. with power applied .....-65°C to +125°C IN- Negative Analog Input ESD protection on all pins (HBM)........................> 4kV CLK Serial Clock *Notice: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device.
MCP3001 All parameters apply at VDD = 5V, VSS = 0V, VREF = 5V, TAMB = -40°C to +85°C, fSAMPLE = 200 ksps and fCLK = 14*fSAMPLE, unless otherwise noted. Typical values apply for VDD = 5V, TAMB =25°C, unless otherwise noted.
MCP3001 All parameters apply at VDD = 5V, VSS = 0V, VREF = 5V, TAMB = -40°C to +85°C, fSAMPLE = 200 ksps and fCLK = 14*fSAMPLE, unless otherwise noted. Typical values apply for VDD = 5V, TAMB =25°C, unless otherwise noted. Parameter Sym Min Typ Max Units Conditions Operating Voltage VDD 2.7 — 5.5 V Operating Current IDD — 400 210 500 µA µA VDD = 5.0V, DOUT unloaded VDD = 2.7V, DOUT unloaded Standby Current IDDS — 0.005 2 µA CS = VDD = 5.
MCP3001 Load circuit for tDIS and tEN Load circuit for tR, tF, tDO 1.
MCP3001 2.0 TYPICAL PERFORMANCE CHARACTERISTICS Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
MCP3001 Note: Unless otherwise indicated, VDD = VREF = 5V, fSAMPLE = 200 ksps, fCLK = 14*Sample Rate,TA = 25°C 0.4 0.4 fSAMPLE = 75 ksps Positive INL 0.2 0.2 INL (LSB) INL (LSB) VDD = VREF = 2.7V 0.3 0.3 0.1 0.0 -0.1 Negative INL 0.0 -0.1 -0.2 -0.2 -0.3 -0.3 -0.4 Positive INL 0.1 Negative INL -0.4 -50 -25 0 25 50 75 100 -50 -25 0 Integral Nonlinearity (INL) vs. 0.4 0.3 0.3 DNL (LSB) DNL (LSB) Positive DNL 0.0 -0.1 Negative DNL (INL) vs. Positive DNL 0.1 0.0 -0.
MCP3001 Note: Unless otherwise indicated, VDD = VREF = 5V, fSAMPLE = 200 ksps, fCLK = 14*Sample Rate,TA = 25°C 0.5 0.5 0.4 0.4 fSAMPLE = 200 ksps 0.3 0.2 DNL (LSB) DNL (LSB) 0.3 VDD = VREF = 5V 0.1 0.0 -0.1 -0.2 0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.3 -0.4 -0.4 -0.5 VDD = VREF = 2.7V fSAMPLE = 75 ksps -0.5 0 128 256 384 512 640 768 896 1024 0 128 256 384 Digital Code 512 640 768 896 1024 Digital Code FIGURE 2-13: Differential Nonlinearity Code (Representative Part).
MCP3001 Note: Unless otherwise indicated, VDD = VREF = 5V, fSAMPLE = 200 ksps, fCLK = 14*Sample Rate,TA = 25°C 1.0 0.0 VDD = V REF = 2.7V 0.9 V DD = V REF = 5V fSAMPLE = 75 ksps 0.8 fSAMPLE = 200 ksps Offset Error (LSB) Gain Error (LSB) 0.1 -0.1 -0.2 -0.3 V DD = V REF = 5V 0.7 0.6 0.5 V DD = VREF = 2.7V 0.4 fSAMPLE = 75 ksps 0.3 0.2 0.1 fSAMPLE = 200 ksps 0.0 -0.4 -50 -25 0 25 50 75 -50 100 -25 0 FIGURE 2-19: Gain Error vs. Temperature.
MCP3001 Note: Unless otherwise indicated, VDD = VREF = 5V, fSAMPLE = 200 ksps, fCLK = 14*Sample Rate,TA = 25°C 10.0 9.9 ENOB (rms) ENOB (rms) 9.8 9.7 V DD = VREF = 5V 9.6 VDD = V REF = 2.7V 9.5 fSAMPLE = 200 ksps fSAMPLE = 75 ksps 9.4 9.3 9.2 9.1 9.0 0.0 1.0 2.0 3.0 4.0 10.0 9.8 9.6 9.4 9.2 VDD = VREF = 5V fSAMPLE = 200 ksps 9.0 8.8 8.6 8.4 8.2 8.0 VDD = VREF = 2.7V fSAMPLE = 75 ksps 1 5.
MCP3001 Note: Unless otherwise indicated, VDD = VREF = 5V, fSAMPLE = 200 ksps, fCLK = 14*Sample Rate,TA = 25°C 500 450 400 IREF (µA) IDD (µA) 350 300 250 200 150 VREF = V DD 100 All points at fCLK = 2.8 MHz except 50 at VREF = VDD = 2.5V, fCLK =1.05 MHz 0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 120 110 100 90 80 70 60 50 40 30 20 10 0 VREF = VDD All points at fCLK = 2.8 MHz except at VREF = VDD = 2.5V, fCLK = 1.05 MHz 2.0 6.0 2.5 3.0 3.5 VDD (V) FIGURE 2-31: IDD vs. VDD.
MCP3001 Note: Unless otherwise indicated, VDD = VREF = 5V, fSAMPLE = 200 ksps, fCLK = 14*Sample Rate,TA = 25°C 60 2.0 Analog Input Leakage (nA) VREF = CS = VDD 50 IDDS (pA) 40 30 20 10 0 1.8 V DD = V REF = 5V 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -50 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -25 0 25 50 75 100 6.0 Temperature (°C) V DD (V) FIGURE 2-39: Analog Input Leakage Current vs. Temperature. FIGURE 2-37: IDDS vs. VDD. 100.00 VDD = VREF = CS = 5V IDDS (nA) 10.00 1.00 0.10 0.
MCP3001 3.0 PIN DESCRIPTIONS 3.1 IN+ Positive analog input. This input can vary from IN- to VREF + IN-. 3.2 IN- Negative analog input. This input can vary ±100 mV from VSS. 3.3 CS/SHDN(Chip Select/Shutdown) The CS/SHDN pin is used to initiate communication with the device when pulled low and will end a conversion and put the device in low power standby when pulled high. The CS/SHDN pin must be pulled high between conversions. 3.
MCP3001 VDD RSS Sampling Switch VT = 0.6V CHx CPIN 7 pF VA VT = 0.6V SS ILEAKAGE ±1 nA RS = 1 kΩ CSAMPLE = DAC capacitance = 20 pF VSS Legend VA RSS CHx CPIN VT ILEAKAGE SS RS CSAMPLE FIGURE 4-1: = = = = = = signal source source impedance input channel pad input pin capacitance threshold voltage leakage current at the pin due to various junctions sampling switch sampling switch resistor sample/hold capacitance = = = Analog Input Model. Clock Frequency (MHz) 4.0 3.5 V DD = VREF = 5V 3.
MCP3001 5.0 SERIAL COMMUNICATIONS Communication with the device is done using a standard SPI compatible serial interface. Initiating communication with the MCP3001 begins with the CS going low. If the device was powered up with the CS pin low, it must be brought high and back low to initiate communication. The device will begin to sample the analog input on the first rising edge after CS goes low.
MCP3001 6.0 APPLICATIONS INFORMATION 6.1 Using the MCP3001 with Microcontroller SPI Ports ler’s receive buffer will contain two unknown bits (the output is at high impedance for the first two clocks), the null bit and the highest order five bits of the conversion. After the second eight clocks have been sent to the device, the MCU receive register will contain the lowest order five bits and the B1-B4 bits repeated as the ADC has begun to shift out LSB first data with the extra clocks.
MCP3001 6.2 Maintaining Minimum Clock Speed When the MCP3001 initiates the sample period, charge is stored on the sample capacitor. When the sample period is complete, the device converts one bit for each clock that is received. It is important for the user to note that a slow clock rate will allow charge to bleed off the sample cap while the conversion is taking place. At 85°C (worst case condition), the part will maintain proper charge on the sample cap for 700 µs at VDD = 2.7V and 1.5 ms at VDD = 5V.
MCP3001 7.0 PACKAGING INFORMATION 7.1 Package Marking Information 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW Example: MCP3001 I/PNNN e3 0736 8-Lead SOIC (150 mil) Example: MCP3001 ISN e3 0736 XXXXXXXX XXXXYYWW NNN NNN Example: 8-Lead MSOP 3001I e3 XXXXXX YWWNNN 725NNN Example: 8-Lead TSSOP XXXX 3001 e3 YYWW 0716 NNN NNN Legend: XX...
MCP3001 8-Lead Plastic Dual In-Line (P) – 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging N NOTE 1 E1 1 3 2 D E A2 A L A1 c e eB b1 b Units Dimension Limits Number of Pins INCHES MIN N NOM MAX 8 Pitch e Top to Seating Plane A – – .210 Molded Package Thickness A2 .115 .130 .195 Base to Seating Plane A1 .015 – – Shoulder to Shoulder Width E .290 .310 .
MCP3001 8-Lead Plastic Small Outline (SN) – Narrow, 3.90 mm Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D e N E E1 NOTE 1 1 2 3 α h b h A2 A c φ L A1 L1 Units Dimension Limits Number of Pins β MILLMETERS MIN N NOM MAX 8 Pitch e Overall Height A – 1.27 BSC – Molded Package Thickness A2 1.25 – – Standoff § A1 0.10 – 0.
MCP3001 8-Lead Plastic Micro Small Outline Package (MS) [MSOP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N E E1 NOTE 1 1 2 e b A2 A c φ L L1 A1 Units Dimension Limits Number of Pins MILLIMETERS MIN N NOM MAX 8 Pitch e Overall Height A – 0.65 BSC – Molded Package Thickness A2 0.75 0.85 0.95 Standoff A1 0.00 – 0.15 Overall Width E Molded Package Width E1 3.
MCP3001 8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm Body [TSSOP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N E E1 NOTE 1 1 2 b e c A φ A2 A1 L L1 Units Dimension Limits Number of Pins MILLIMETERS MIN N NOM MAX 8 Pitch e Overall Height A – 0.65 BSC – Molded Package Thickness A2 0.80 1.00 1.05 Standoff A1 0.05 – 0.15 1.
MCP3001 APPENDIX A: REVISION HISTORY Revision C (January 2007) This revision includes updates to the packaging diagrams. © 2007 Microchip Technology Inc.
NOTES: DS21293C-page 24 © 2007 Microchip Technology Inc.
MCP3001 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device Device: X /XX Temperature Range Package MCP3001: 10-Bit Serial A/D Converter MCP3001T: 10-Bit Serial A/D Converter (Tape and Reel) (SOIC and TSSOP only) Temperature Range: I = -40°C to +85°C Package: P SN MS ST = = = = Examples: a) MCP3001-I/P: Industrial Temperature, PDIP package.
MCP3001 NOTES: DS21293C-page26 © 2007 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
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