MCP4017/18/19 7-Bit Single I2C™ Digital POT with Volatile Memory in SC70 Package Types Features • Potentiometer or Rheostat configuration options • 7-bit: Resistor Network Resolution - 127 Resistors (128 Steps) • Zero Scale to Full Scale Wiper operation • RAB Resistances: 5 kΩ, 10 kΩ, 50 kΩ, or 100 kΩ • Low Wiper Resistance: 100Ω (typical) • Low Tempco: - Absolute (Rheostat): 50 ppm typical (0°C to 70°C) - Ratiometric (Potentiometer): 10 ppm typical • Simple I2C Protocol with read & write commands • Brown-
MCP4017/18/19 Device Block Diagram VDD VSS SCL SDA A (2) Power-up/ Brown-out Control W I2C Serial Interface Module, Control Logic, & Memory Resistor Network 0 (Pot 0) B (1, 2) Note 1 Note 1: Some configurations will have this signal internally connected to ground. 2: In some configurations, this signal may not be connected externally (internally floating or grounded).
MCP4017/18/19 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings † Voltage on VDD with respect to VSS ..... -0.6V to +7.0V Voltage on SCL, and SDA with respect to VSS ............................................................................. -0.6V to 12.5V Voltage on all other pins (A, W, and B) with respect to VSS ............................ -0.3V to VDD + 0.3V Input clamp current, IIK (VI < 0, VI > VDD, VI > VPP ON HV pins) ........... ±20 mA Output clamp current, IOK (VO < 0 or VO > VDD) .....
MCP4017/18/19 AC/DC CHARACTERISTICS Standard Operating Conditions (unless otherwise specified) Operating Temperature –40°C ≤ TA ≤ +125°C (extended) DC Characteristics All parameters apply across the specified operating ranges unless noted. VDD = +2.7V to 5.5V, 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ devices. Typical specifications represent values for VDD = 5.5V, TA = +25°C. Parameters Sym Min Typ Max Units Conditions Supply Voltage VDD 2.7 — 5.5 V Analog Characteristics specified 1.8 — 5.
MCP4017/18/19 AC/DC CHARACTERISTICS (CONTINUED) Standard Operating Conditions (unless otherwise specified) Operating Temperature –40°C ≤ TA ≤ +125°C (extended) DC Characteristics Parameters Resistance (± 20%) All parameters apply across the specified operating ranges unless noted. VDD = +2.7V to 5.5V, 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ devices. Typical specifications represent values for VDD = 5.5V, TA = +25°C.
MCP4017/18/19 AC/DC CHARACTERISTICS (CONTINUED) Standard Operating Conditions (unless otherwise specified) Operating Temperature –40°C ≤ TA ≤ +125°C (extended) DC Characteristics Parameters Full Scale Error (MCP4018 only) (code = 7Fh) Zero Scale Error (MCP4018 only) (code = 00h) All parameters apply across the specified operating ranges unless noted. VDD = +2.7V to 5.5V, 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ devices. Typical specifications represent values for VDD = 5.5V, TA = +25°C.
MCP4017/18/19 AC/DC CHARACTERISTICS (CONTINUED) Standard Operating Conditions (unless otherwise specified) Operating Temperature –40°C ≤ TA ≤ +125°C (extended) DC Characteristics All parameters apply across the specified operating ranges unless noted. VDD = +2.7V to 5.5V, 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ devices. Typical specifications represent values for VDD = 5.5V, TA = +25°C.
MCP4017/18/19 AC/DC CHARACTERISTICS (CONTINUED) Standard Operating Conditions (unless otherwise specified) Operating Temperature –40°C ≤ TA ≤ +125°C (extended) DC Characteristics All parameters apply across the specified operating ranges unless noted. VDD = +2.7V to 5.5V, 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ devices. Typical specifications represent values for VDD = 5.5V, TA = +25°C. Parameters Sym Min Typ Max Units Conditions Digital Inputs/Outputs (SDA, SCK) Schmitt Trigger High Input Threshold VIH 0.
MCP4017/18/19 1.1 I2C Mode Timing Waveforms and Requirements SCL 93 91 90 92 SDA STOP Condition START Condition I2C Bus Start/Stop Bits Timing Waveforms. FIGURE 1-1: I2C BUS START/STOP BITS REQUIREMENTS TABLE 1-1: I2C AC Characteristics Standard Operating Conditions (unless otherwise specified) Operating Temperature –40°C ≤ TA ≤ +125°C (Extended) Operating Voltage VDD range is described in Section 2.0 “Typical Performance Curves” Param. Symbol No.
MCP4017/18/19 I2C BUS DATA REQUIREMENTS (SLAVE MODE) TABLE 1-2: I2C AC Characteristics Parameter No. Sym Characteristic 100 THIGH Clock high time 101 TLOW Standard Operating Conditions (unless otherwise specified) Operating Temperature –40°C ≤ TA ≤ +125°C (Extended) Operating Voltage VDD range is described in AC/DC characteristics Min Max Units 100 kHz mode 4000 — ns 1.8V-5.5V 600 4700 — — ns ns 2.7V-5.
MCP4017/18/19 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND.
MCP4017/18/19 NOTES: DS22147A-page 12 © 2009 Microchip Technology Inc.
MCP4017/18/19 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
MCP4017/18/19 Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V. DNL 0.2 0.1 INL 80 0 60 -0.1 25°C -0.2 20 -0.3 260 25C Rw 25C INL 25C DNL 85C Rw 85C INL 85C DNL 125C Rw 125C INL 125C DNL 125°C 220 85° INL 180 140 100 RW 60 -40°C 25°C -0.2 DNL 20 2000 25C Rw 25C INL 25C DNL INL 85C Rw 85C INL 85C DNL DNL 125C Rw 125C INL 125C DNL 0.05 1000 -0.05 -0.15 RW -0.25 0 Note: FIGURE 2-5: 5.0 kΩ : Pot Mode – RW (Ω), INL (LSb), DNL (LSb) vs.
MCP4017/18/19 Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V. -0.4 RBW Tempco (PPM) Full-Scale Error (FSE) (LSb) 0.0 -0.2 -0.6 -0.8 5.5V -1.0 -1.2 2.7 -1.4 1.8V -1.6 -1.8 -40 0 40 80 Ambient Temperature (°C) 120 FIGURE 2-9: 5.0 kΩ : Full Scale Error (FSE) vs. Temperature (VDD = 5.5V, 2.7V, 1.8V). 200 180 160 140 120 100 80 60 40 20 0 2.7V 5.5V 0 32 64 96 Wiper Setting (decimal) FIGURE 2-12: 5.0 kΩ : RBW Tempco FIGURE 2-13: Response Time. 5.
MCP4017/18/19 Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V. FIGURE 2-15: 5.0 kΩ : Write Wiper (40h → 3Fh) Settling Time (VDD=5.5V). FIGURE 2-18: 5.0 kΩ : Write Wiper (FFh → 00h) Settling Time (VDD=5.5V). FIGURE 2-16: 5.0 kΩ : Write Wiper (40h → 3Fh) Settling Time (VDD=2.7V). FIGURE 2-19: 5.0 kΩ : Write Wiper (FFh → 00h) Settling Time (VDD=2.7V). FIGURE 2-17: 5.0 kΩ : Write Wiper (40h → 3Fh) Settling Time (VDD=1.8V). FIGURE 2-20: 5.
MCP4017/18/19 Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V. 0.2 0.1 80 0 60 -0.1 -40°C DNL RW INL 25°C -0.2 20 -0.3 260 25C Rw 25C INL 25C DNL INL 220 85C Rw 85C INL 85C DNL 125C Rw 125C INL 125C DNL 0.1 180 0 140 RW 25°C 60 -0.2 -40°C 20 125C Rw 125C INL 125C DNL 0.25 2000 0.05 -0.05 RW -0.15 -0.25 0 FIGURE 2-23: 10 kΩ Pot Mode : RW (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Temperature (VDD = 1.8V).
MCP4017/18/19 0.0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1.0 100 RBW Tempco (PPM) Full-Scale Error (FSE) (LSb) Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V. 5.5V 2.7 1.8V 80 2.7V 60 40 5.5V 20 0 -40 0 40 80 Ambient Temperature (°C) 120 FIGURE 2-27: 10 kΩ : Full Scale Error (FSE) vs. Temperature (VDD = 5.5V, 2.7V, 1.8V). 0 32 64 96 Wiper Setting (decimal) FIGURE 2-30: 10 kΩ : RBW Tempco FIGURE 2-31: Response Time. 10 kΩ : Power-Up Wiper ΔRWB / ΔT vs. Code.
MCP4017/18/19 Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V. FIGURE 2-33: 10 kΩ : Write Wiper (40h → 3Fh) Settling Time (VDD=5.5V). FIGURE 2-36: 10 kΩ : Write Wiper (FFh → 00h) Settling Time (VDD=5.5V). FIGURE 2-34: 10 kΩ : Write Wiper (40h → 3Fh) Settling Time (VDD=2.7V). FIGURE 2-37: 10 kΩ : Write Wiper (FFh → 00h) Settling Time (VDD=2.7V). FIGURE 2-35: 10 kΩ : Write Wiper (40h → 3Fh) Settling Time (VDD=1.8V). FIGURE 2-38: 10 kΩ : Write Wiper (FFh → 00h) Settling Time (VDD=1.8V).
MCP4017/18/19 Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V. 0.2 0.1 0 60 DNL -0.1 INL -40°C RW -0.2 25°C 20 -0.3 260 25C Rw 25C INL 25C DNL 85C Rw 85C INL 85C DNL 220 125C Rw 125C INL 125C DNL 125°C 85° DNL INL 25°C 60 -0.1 -0.2 20 6000 -0.05 INL 2000 -0.15 RW 0 -0.25 FIGURE 2-41: 50 kΩ Pot Mode : RW (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Temperature (VDD = 1.8V).
MCP4017/18/19 Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V. 100 -0.04 RBW Tempco (PPM) Full-Scale Error (FSE) (LSb) 0.00 -0.08 2.7 5.5V -0.12 1.8V -0.16 80 60 2.7V 40 5.5V 20 0 -40 0 40 80 Ambient Temperature (°C) 120 FIGURE 2-45: 50 kΩ : Full Scale Error (FSE) vs. Temperature (VDD = 5.5V, 2.7V, 1.8V). 0 32 64 96 Wiper Setting (decimal) FIGURE 2-48: 50 kΩ : RBW Tempco FIGURE 2-49: Response Time. 50 kΩ : Power-Up Wiper ΔRWB / ΔT vs. Code.
MCP4017/18/19 Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V. FIGURE 2-51: 50 kΩ : Write Wiper (40h → 3Fh) Settling Time (VDD=5.5V). FIGURE 2-54: 50 kΩ : Write Wiper (FFh → 00h) Settling Time (VDD=5.5V). FIGURE 2-52: 50 kΩ : Write Wiper (40h → 3Fh) Settling Time (VDD=2.7V). FIGURE 2-55: 50 kΩ : Write Wiper (FFh → 00h) Settling Time (VDD=2.7V). FIGURE 2-53: 50 kΩ : Write Wiper (40h → 3Fh) Settling Time (VDD=1.8V). FIGURE 2-56: 50 kΩ : Write Wiper (FFh → 00h) Settling Time (VDD=1.8V).
MCP4017/18/19 Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V. DNL 0.2 0.1 80 0 60 INL 40 120 0.3 -0.1 100 RW -40°C 25°C -0.2 20 -0.3 260 25C Rw 25C INL 25C DNL DNL 220 85° 85C Rw 85C INL 85C DNL 125C Rw 125C INL 125C DNL 0 140 INL 25°C 60 RW -40°C 20 -0.2 125C Rw 125C INL 125C DNL 2500 RW INL 0 -0.25 FIGURE 2-59: 100 kΩ Pot Mode : RW (Ω), INL (LSb), DNL (LSb) vs. Wiper Setting and Temperature (VDD = 1.8V). © 2009 Microchip Technology Inc. 125°C 0.
MCP4017/18/19 Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V. 100 -0.02 RBW Tempco (PPM) Full-Scale Error (FSE) (LSb) 0.00 5.5V -0.04 2.7 -0.06 80 60 2.7V 40 20 5.5V 1.8V -0.08 0 -40 0 40 80 Ambient Temperature (°C) 120 FIGURE 2-63: 100 kΩ : Full Scale Error (FSE) vs. Temperature (VDD = 5.5V, 2.7V, 1.8V). 0 32 64 96 Wiper Setting (decimal) FIGURE 2-66: 100 kΩ : RBW Tempco ΔRWB / ΔT vs. Code. Zero-Scale Error (ZSE) (LSb) 0.12 0.08 1.8V 2.7 0.04 5.5V 0.
MCP4017/18/19 Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V. FIGURE 2-69: 100 kΩ : Write Wiper (40h → 3Fh) Settling Time (VDD = 5.5V). FIGURE 2-72: 100 kΩ : Write Wiper (FFh → 00h) Settling Time (VDD = 5.5V). FIGURE 2-70: 100 kΩ : Write Wiper (40h → 3Fh) Settling Time (VDD = 2.7V). FIGURE 2-73: 100 kΩ : Write Wiper (FFh → 00h) Settling Time (VDD = 2.7V). FIGURE 2-71: 100 kΩ : Write Wiper (40h → 3Fh) Settling Time (VDD = 1.8V).
MCP4017/18/19 Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V. 4 0.3 3.5 2.5 VOL (mV) VIH (V) 0.25 5.5V 3 2.7V 2 1.5 1 2.7V (@ 3mA) 0.2 0.15 5.5V (@ 3mA) 0.1 1.8V (@ 1mA) 0.05 0.5 1.8V 0 -40 0 40 80 0 120 -40 0 Temperature (°C) FIGURE 2-75: Temperature. VIH (SCL, SDA) vs. VDD and FIGURE 2-77: Temperature. 80 120 VOL (SDA) vs. VDD and 1.2 2 5.5 V 1 5.5V 1.5 2.7V 0.8 VDD (V) VIL (V) 40 Temperature (°C) 1 2.7V 0.6 0.4 0.5 1.8V 0.
MCP4017/18/19 Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V. 10 10 Code = 7Fh Code = 3Fh dB dB -30 Code = 0Fh Code = 3Fh -10 -10 -20 Code = 7Fh 0 0 Code = 1Fh Code = 1Fh -20 Code = 0Fh -30 Code = 01h -40 Code = 01h -40 -50 -50 100 1,000 -60 100 10,000 5 kΩ – Gain vs. Frequency FIGURE 2-79: (-3dB). Test Circuits Code = 7Fh 0 dB -30 +5V Code = 3Fh -10 -20 10,000 FIGURE 2-82: 100 kΩ – Gain vs. Frequency (-3dB). 2.
MCP4017/18/19 NOTES: DS22147A-page 28 © 2009 Microchip Technology Inc.
MCP4017/18/19 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. Additional descriptions of the device pins follow.
MCP4017/18/19 3.1 Positive Power Supply Input (VDD) The VDD pin is the device’s positive power supply input. The input power supply is relative to VSS and can range from 1.8V to 5.5V. A de-coupling capacitor on VDD (to VSS) is recommended to achieve maximum performance. While the device’s voltage is in the range of 1.8V ≤ VDD < 2.7V, the Resistor Network’s electrical performance of the device may not meet the data sheet specifications. 3.2 Ground (VSS) The VSS pin is the device ground reference. 3.
MCP4017/18/19 4.0 GENERAL OVERVIEW 4.1.2 BROWN-OUT RESET The MCP4017/18/19 devices are general purpose digital potentiometers intended to be used in applications where a programmable resistance with moderate bandwidth is desired. When the device powers down, the device VDD will cross the VPOR/VBOR voltage. Once the VDD voltage decreases below the VPOR/VBOR voltage the following happens: This Data Sheet covers a family of three Digital Potentiometer and Rheostat devices.
MCP4017/18/19 TABLE 4-1: VDD Level DEVICE FUNCTIONALITY AT EACH VDD REGION (NOTE 1) Serial Interface Potentiometer Terminals “unknown” VDD < VBOR < 1.8V Ignored VBOR ≤ VDD < 1.8V “Unknown” Operational with reduced electrical specs 1.8V ≤ VDD < 2.7V Accepted Operational with reduced electrical specs 2.7V ≤ VDD ≤ 5.
MCP4017/18/19 5.0 SERIAL INTERFACE I2C MODULE 5.1 A 2-wire I2C serial protocol is used to write or read the digital potentiometer’s wiper register. The I2C protocol utilizes the SCL input pin and SDA input/output pin. The I2C serial interface supports the following features.
MCP4017/18/19 5.2 I2C Bit Definitions If the Slave Address is not valid, the Slave Device will issue a Not A (A). The A bit will have the SDA signal high. I2C bit definitions include: • • • • • • Start Bit Data Bit Acknowledge (A) Bit Repeated Start Bit Stop Bit Clock Stretching If an error condition occurs (such as an A instead of A) then an START bit must be issued to reset the command state machine. TABLE 5-1: Figure 5-8 shows the waveform for these states. 5.2.
MCP4017/18/19 5.2.5 STOP BIT 5.2.7 If any part of the I2C transmission does not meet the command format, it is aborted. This can be intentionally accomplished with a START or STOP condition. This is done so that noisy transmissions (usually an extra START or STOP condition) are aborted before they corrupt the device. The Stop bit (see Figure 5-6) Indicates the end of the I2C Data Transfer Sequence. The Stop bit is defined as the SDA signal rising when the SCL signal is “High”.
MCP4017/18/19 I2C COMMAND PROTOCOL 5.2.9 The MCP4017/18/19 is a slave I2C device which supports 7-bit slave addressing. The slave address contains seven fixed bits. Figure 5-9 shows the control byte format. 5.2.9.1 DEVICE I2C ADDRESS TABLE 5-2: Device I2C Address MCP4017 MCP4018 MCP4019 ‘0101111’ ‘0101111’ ‘0101111’ Comment Control Byte (Slave Address) The Control Byte is always preceded by a START condition.
MCP4017/18/19 5.3 Software Reset Sequence Note: This technique should be supported by any I2C compliant device. The 24xxxx I2C Serial EEPROM devices support this technique, which is documented in AN1028. The Stop bit terminates the current I2C bus activity. The MCP4017/18/19 wait to detect the next Start condition. This sequence does not effect any other I2C devices which may be on the bus, as they should disregard this as an invalid command.
MCP4017/18/19 5.4.1 WRITE OPERATION 5.4.2 The write operation requires the START condition, Control Byte, Acknowledge, Data Byte, Acknowledge and STOP (or RESTART) condition. The Control (Slave Address) Byte requires the R/W bit equal to a logic zero (R/W = “0”) to generate a write sequence. The MCP4017/18/19 is responsible for generating the Acknowledge (A) bits.
MCP4017/18/19 Fixed Address S 0 1 0 1 1 Read/Write bit (“1” = Read) 1 1 1 A 0 D6 D5 D4 D3 D2 D1 D0 A(1) 0 D6 D5 D4 D3 D2 D1 D0 A(1) Slave Address Byte Data Byte Data Byte STOP bit (2) 0 D6 D5 D4 D3 D2 D1 D0 A(1)0 D6 D5 D4 D3 D2 D1 D0 A Data Byte P Data Byte Legend S = Start Condition P = Stop Condition A = Acknowledge X = Don’t Care R/W = Read/Write bit Note 1 = Data bits Note 1: Master Device is responsible for A / A signal.
MCP4017/18/19 Write 1 Byte S Slave Address Master A P S 0 1 0 1 1 1 1 0 1 x d d d d d d d 1 P MCP4017/18/19 I2C Bus R / W A Data Byte (1) 0 0 S 0 1 0 1 1 1 1 0 0 x d d d d d d d 0 P Write 2 Bytes S Slave Address Master A Data Byte (1) A P S 0 1 0 1 1 1 1 0 1 x d d d d d d d 1 x d d d d d d d 1 P MCP4017/18/19 I2C Bus R / W A Data Byte (1) 0 0 0 S 0 1 0 1 1 1 1 0 0 x d d d d d d d 0 x d d d d d d d 1 P Read 1 Byte S Slave Address Master S 0 1 0 1 1 1 1 1 1 MCP4017/18/19 I2C Bus R / W
MCP4017/18/19 6.0 RESISTOR NETWORK A The Resistor Network is made up of two parts. These are: • Resistor Ladder • Wiper Figure 6-1 shows a block diagram for the resistive network. Digital potentiometer applications can be divided into two resistor network categories: • Rheostat configuration • Potentiometer (or voltage divider) configuration RS The MCP4019 device is a Rheostat device with terminal A of the resistor floating, terminal B internally connected to ground, and the wiper (W) available on pin.
MCP4017/18/19 Step resistance (RS) is the resistance from one tap setting to the next. This value will be dependent on the RAB value that has been selected. Equation 6-1 shows the calculation for the step resistance while Table 6-2 shows the typical step resistances for each device.
MCP4017/18/19 6.2 Resistor Configurations 6.2.1 6.2.2 RHEOSTAT CONFIGURATION When used as a rheostat, two of the three digital potentiometer’s terminals are used as a resistive element in the circuit. With terminal W (wiper) and either terminal A or terminal B, a variable resistor is created. The resistance will depend on the tap setting of the wiper (and the wiper’s resistance). The resistance is controlled by changing the wiper setting The unused terminal (B or A) should be left floating.
MCP4017/18/19 6.3 Wiper Resistance In a potentiometer configuration, the wiper resistance variation does not effect the output voltage seen on the W pin. Wiper resistance is the series resistance of the analog switch that connects the selected resistor ladder node to the Wiper Terminal common signal (see Figure 6-1). The slope of the resistance has a linear area (at the higher voltages) and a non-linear area (at the lower voltages).
MCP4017/18/19 6.4 Operational Characteristics Understanding the operational characteristics of the device’s resistor components is important to the system design. 6.4.1 6.4.1.1 6.4.1.2 Differential Non-linearity (DNL) DNL error is the measure of variations in code widths from the ideal code width. A DNL error of zero would imply that every code is exactly 1 LSb wide.
MCP4017/18/19 6.4.2 MONOTONIC OPERATION Monotonic operation means that the device’s resistance increases with every step change (from terminal A to terminal B or terminal B to terminal A). The wiper resistances difference at each tap location. When changing from one tap position to the next (either increasing or decreasing), the ΔRW is less then the ΔRS. When this change occurs, the device voltage and temperature are “the same” for the two tap positions.
MCP4017/18/19 7.0 DESIGN CONSIDERATIONS In the design of a system with the MCP4017/18/19 devices, the following considerations should be taken into account. These are: • The Power Supply • The Layout In the design of a system with the MCP4017/18/19 devices, the following considerations should be taken into account: • Power Supply Considerations • Layout Considerations 7.
MCP4017/18/19 NOTES: DS22147A-page 48 © 2009 Microchip Technology Inc.
MCP4017/18/19 8.0 APPLICATIONS EXAMPLES Digital potentiometers have a multitude of practical uses in modern electronic circuits. The most popular uses include precision calibration of set point thresholds, sensor trimming, LCD bias trimming, audio attenuation, adjustable power supplies, motor control overcurrent trip setting, adjustable gain amplifiers and offset trimming.
MCP4017/18/19 8.2 Operational Amplifier Applications Figure 8-3 and Figure 8-4 illustrate typical amplifier circuits that could replace fixed resistors with the MCP4017/18/19 to achieve digitally-adjustable analog solutions. VIN MCP6291 + Op Amp VDD VOUT – R1 A R3 W B MCP4018 MCP4017 FIGURE 8-3: Trimming Offset and Gain in a Non-Inverting Amplifier.
MCP4017/18/19 8.3 Temperature Sensor Applications Thermistors are resistors with very predictable variation with temperature. Thermistors are a popular sensor choice when a low-cost temperature-sensing solution is desired. Unfortunately, thermistors have non-linear characteristics that are undesirable, typically requiring trimming in an application to achieve greater accuracy. There are several common solutions to trim & linearize thermistors.
MCP4017/18/19 8.4 Wheatstone Bridge Trimming Another common configuration to “excite” a sensor (such as a strain gauge, pressure sensor or thermistor) is the wheatstone bridge configuration. The wheatstone bridge provides a differential output instead of a single-ended output. Figure 8-7 illustrates a wheatstone bridge utilizing one to three digital potentiometers. The digital potentiometers in this example are used to trim the offset and gain of the wheatstone bridge.
MCP4017/18/19 9.0 DEVELOPMENT SUPPORT 9.1 Development Tools To assist in your design and evaluation of the MCP4017/18/19 devices, a Demo board using the MCP4017 device is in development. Please check the Microchip web site for the release of this board. The board part number is tentatively MCP4XXXDM-PGA, and is expected to be available in the summer of 2009. TABLE 9-1: 9.2 Technical Documentation Several additional technical documents are available to assist you in your design and development.
MCP4017/18/19 NOTES: DS22147A-page 54 © 2009 Microchip Technology Inc.
MCP4017/18/19 10.0 PACKAGING INFORMATION 10.1 Package Marking Information Example: 5-Lead SC70 XXNN Part Number Code MCP4019T-502E/LT BENN MCP4019T-103E/LT BFNN MCP4019T-503E/LT BGNN MCP4019T-104E/LT BHNN BENN 6-Lead SC70 XXNN Example: Part Number Code Part Number Code MCP4017T-502E/LT AENN MCP4018T-502E/LT AANN MCP4017T-103E/LT AFNN MCP4018T-103E/LT ABNN MCP4017T-503E/LT AGNN MCP4018T-503E/LT ACNN MCP4017T-104E/LT AHNN MCP4018T-104E/LT ADNN Legend: XX...
MCP4017/18/19 .
MCP4017/18/19 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2009 Microchip Technology Inc.
MCP4017/18/19 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22147A-page 58 © 2009 Microchip Technology Inc.
MCP4017/18/19 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2009 Microchip Technology Inc.
MCP4017/18/19 NOTES: DS22147A-page 60 © 2009 Microchip Technology Inc.
MCP4017/18/19 APPENDIX A: REVISION HISTORY Revision A (March 2009) • Original Release of this Document. © 2009 Microchip Technology Inc.
MCP4017/18/19 NOTES: DS22147A-page 62 © 2009 Microchip Technology Inc.
MCP4017/18/19 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO.
MCP4017/18/19 NOTES: DS22147A-page 64 © 2009 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
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