Datasheet

ManualsBrandsMicrochip ManualsEEPROMEEPROM 2KB 900ns SOIC

24C02C

Features:

• Single-Supply with Operation from 4.5V to 5.5V

• Low-Power CMOS Technology:

- Read current 1 mA, max.

- Standby current 5 μA, max.

• 2-Wire Serial Interface, I

C™ Compatible

• Cascadable up to Eight Devices

• Schmitt Trigger Inputs for Noise Suppression

• Output Slope Control to Eliminate Ground Bounce

• 100 kHz and 400 kHz Clock Compatibility

• Fast Page or Byte Write Time 1 ms, typical

• Self-Timed Erase/Write Cycle

• 16-Byte Page Write Buffer

• Hardware Write-Protect for Upper Half of the

Array (80h-FFh)

• ESD Protection >4,000V

• More than 1 Million Erase/Write Cycles

• Data Retention >200 Years

• Factory Programming Available

• Packages Include 8-lead PDIP, SOIC, TSSOP,

DFN, TDFN and MSOP

• Pb-Free and RoHS Compliant

• Temperature ranges:

Description:

The Microchip Technology Inc. 24C02C is a 2K bit

Serial Electrically Erasable PROM with a voltage range

of 4.5V to 5.5V. The device is organized as a single

block of 256 x 8-bit memory with a 2-wire serial

interface. Low-current design permits operation with

max. standby and active currents of only 5 μA and 1

mA, respectively. The device has a page write capabil-

ity for up to 16 bytes of data and has fast write cycle

times of only 1 ms for both byte and page writes.

Functional address lines allow the connection of up to

eight 24C02C devices on the same bus for up to 16K

bits of contiguous EEPROM memory. The device is

available in the standard 8-pin PDIP, 8-pin SOIC (3.90

mm), 8-pin 2x3 DFN and TDFN, 8-pin MSOP and

TSSOP packages.

Block Diagram

Package Types

- Industrial (I): -40°C to +85°C

- Automotive (E): -40°C to +125°C

I/O

Control

Logic

Memory

Control

Logic XDEC

HV Generator

EEPROM

Array

Write-Protect

Circuitry

YDEC

Vcc

Vss

Sense Amp.

R/W Control

SDA

SCL

A0 A1 A2

VCC

SCL

SDA

PDIP, MSOP

SOIC, TSSOP

SCL

SDA

DFN/TDFN

SCL

SDA

2K 5.0V I

™

Serial EEPROM

Summary of content (30 pages)

PAGE 1
24C02C 2K 5.0V I2C™ Serial EEPROM Features: Description: • Single-Supply with Operation from 4.5V to 5.5V • Low-Power CMOS Technology: - Read current 1 mA, max. - Standby current 5 μA, max.
PAGE 2
4C02C 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings(†) VCC .............................................................................................................................................................................7.0V All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V Storage temperature ...................................................................................
PAGE 3
24C02C TABLE 1-2: AC CHARACTERISTICS Electrical Characteristics: Industrial (I): VCC = +4.5V to 5.5V Automotive (E): VCC = +4.5V to 5.5V AC CHARACTERISTICS Param. No. Sym. Characteristic Min. Max.
PAGE 4
24C02C FIGURE 1-1: BUS TIMING DATA 5 SCL 7 SDA IN D4 2 3 8 9 4 10 6 14 11 12 SDA OUT DS21202J-page 4 © 2008 Microchip Technology Inc.
PAGE 5
24C02C 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. TABLE 2-1: Name PIN FUNCTION TABLE PDIP SOIC TSSOP DFN/TDFN MSOP Function A0 1 1 1 1 1 Address Pin A0 A1 2 2 2 2 2 Address Pin A1 A2 3 3 3 3 3 Address Pin A2 VSS 4 4 4 4 4 Ground SDA 5 5 5 5 5 Serial Address/Data I/O SCL 6 6 6 6 6 Serial Clock WP 7 7 7 7 7 Write-Protect Input VCC 8 8 8 8 8 +4.5 V to 5.5 V Power Supply 2.
PAGE 6
24C02C 3.0 FUNCTIONAL DESCRIPTIONS The 24C02C supports a bidirectional 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as transmitter, and a device receiving data as receiver. The bus has to be controlled by a master device that generates the Serial Clock (SCL), controls the bus access, and generates the Start and Stop conditions, while the 24C02C works as slave.
PAGE 7
24C02C FIGURE 4-1: SCL (A) DATA TRANSFER SEQUENCE ON THE SERIAL BUS (B) (C) (D) Start Condition Address or Acknowledge Valid (C) (A) SDA FIGURE 4-2: Stop Condition Data Allowed to Change ACKNOWLEDGE TIMING Acknowledge Bit SCL 1 2 SDA 3 4 5 6 7 Data from transmitter Transmitter must release the SDA line at this point allowing the Receiver to pull the SDA line low to acknowledge the previous eight bits of data. © 2008 Microchip Technology Inc.
PAGE 8
24C02C 5.0 DEVICE ADDRESSING A control byte is the first byte received following the Start condition from the master device (Figure 5-1). The control byte consists of a four-bit control code; for the 24C02C this is set as ‘1010’ binary for read and write operations. The next three bits of the control byte are the Chip Select bits (A2, A1, A0). The Chip Select bits allow the use of up to eight 24C02C devices on the same bus and are used to select which device is accessed.
PAGE 9
24C02C 6.0 WRITE OPERATIONS 6.1 Byte Write As with the byte write operation, once the Stop condition is received an internal write cycle will begin (Figure 6-2). If an attempt is made to write to the protected portion of the array when the hardware write protection has been enabled, the device will acknowledge the command, but no data will be written. The write cycle time must be observed even if the write protection is enabled.
PAGE 10
24C02C 7.0 ACKNOWLEDGE POLLING Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the Stop condition for a Write command has been issued from the master, the device initiates the internally timed write cycle. ACK polling can be initiated immediately. This involves the master sending a Start condition followed by the control byte for a Write command (R/W = 0).
PAGE 11
24C02C 8.0 READ OPERATION 8.2 Random read operations allow the master to access any memory location in a random manner. To perform this type of read operation, first the word address must be set. This is done by sending the word address to the 24C02C as part of a write operation. After the word address is sent, the master generates a Start condition following the acknowledge. This terminates the write operation, but not before the internal Address Pointer is set.
PAGE 12
24C02C 9.0 PACKAGING INFORMATION 9.1 Package Marking Information 8-Lead PDIP (300 mil) XXXXXXXX T/XXXNNN YYWW 8-Lead SOIC (3.90 mm) XXXXXXXT XXXXYYWW NNN 8-Lead TSSOP Example: 24C02CI SN e3 0527 13F Example: 4C2C TYWW I527 NNN 13F XXXXT YWWNNN 8-Lead 2x3 DFN XXX YWW NN 8-Lead 2x3 TDFN DS21202J-page 12 24C02C I/P e3 13F 0527 XXXX 8-Lead MSOP XXX YWW NN Example: Example: 4C2CI 52713F Example: 2P7 527 13 Example: AP7 527 13 © 2008 Microchip Technology Inc.
PAGE 13
24C02C 1st Line Marking Codes Part Number DFN TSSOP 24C02C Note: TDFN MSOP 4C2C 4C2CT I Temp. E Temp. I Temp. E Temp. 2P7 2P8 AP7 AP8 T = Temperature grade (I, E) Legend: XX...
PAGE 14
24C02C 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 N NOTE 1 E1 1 3 2 D E A2 A L A1 c e eB b1 b 6 &! ' ! 9 ' &! 7"') % ! 7,8. 7 7 & ; < & & 7: 1 , = = - 1 ! & & = = .
PAGE 15
24C02C ! "" #$ %& ! ' 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 D e N E E1 NOTE 1 1 2 3 α h b h A2 A c φ L A1 L1 6 &! ' ! 9 ' &! 7"') % ! β 99 . . 7 7 7: ; < & : 8 & = = = = = # # 4 4 !! & # %% + 1 , : > #& . # # 4 > #& .
PAGE 16
24C02C ! "" #$ %& ! ' 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 DS21202J-page 16 © 2008 Microchip Technology Inc.
PAGE 17
24C02C () )" * ! ( +%+ ( ! 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 D N E E1 NOTE 1 1 2 b e c A φ A2 A1 L L1 6 &! ' ! 9 ' &! 7"') % ! 99 . . 7 7 7: ; < & : 8 & = = < = # # 4 4 !! & # %% ? 1 , : > #& . # # 4 > #& .
PAGE 18
24C02C , " ! * - , , ! 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 D N E E1 NOTE 1 1 2 e b A2 A c φ L L1 A1 6 &! ' ! 9 ' &! 7"') % ! 99 . . 7 7 7: ; < & : 8 & = = < = # # 4 4 !! & # %% ? 1 , : > #& . # # 4 > #& .
PAGE 19
24C02C . $ * - ,' /0 0 %& . 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 D e b N N L K E2 E EXPOSED PAD NOTE 1 2 1 2 NOTE 1 1 D2 BOTTOM VIEW TOP VIEW A A3 A1 NOTE 2 6 &! ' ! 9 ' &! 7"') % ! 99 . .
PAGE 20
24C02C . $ * - ,' /0 0 %& . 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 DS21202J-page 20 © 2008 Microchip Technology Inc.
PAGE 21
24C02C . $ * - , /0 0 %12 ( . 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 © 2008 Microchip Technology Inc.
PAGE 22
24C02C . $ * - , /0 0 %12 ( . 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 DS21202J-page 22 © 2008 Microchip Technology Inc.
PAGE 23
24C02C APPENDIX A: REVISION HISTORY Revision D Corrections to Section 1.0, Electrical Characteristics. Revision E Added DFN package. Revision F (02/2007) Revised Features section; Section 1.0 revised Ambient temperature; Revised Tables 1-1, 1-2, (removed commercial temp); Revised Table 2-1; Replaced On-line Support page; Replaced Package Drawings; Revised Product ID section. Revision G (03/2007) Replaced Package Drawings (Rev. AM).
PAGE 25
24C02C THE MICROCHIP WEB SITE CUSTOMER SUPPORT Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers.
PAGE 26
24C02C READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document.
PAGE 27
24C02C PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO.
PAGE 29
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
PAGE 30
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