Datasheet

ManualsBrandsMicrochip ManualsEEPROMEEPROM 512KB 900ns SOIJ

 2010 Microchip Technology Inc. DS21754M-page 1

24AA512/24LC512/24FC512

Device Selection Table

Features:

• Single Supply with Operation down to 1.7V for

24AA512 and 24FC512 Devices, 2.5V for

24LC512 Devices

• Low-Power CMOS Technology:

- Active current 400 uA, typical

- Standby current 100 nA, typical

• 2-Wire Serial Interface, I

™

Compatible

• Cascadable for up to Eight Devices

• Schmitt Trigger Inputs for Noise Suppression

• Output Slope Control to Eliminate Ground Bounce

• 100 kHz and 400 kHz Clock Compatibility

• Page Write Time 5 ms max.

• Self-Timed Erase/Write Cycle

• 128-Byte Page Write Buffer

• Hardware Write-Protect

• ESD Protection >4000V

• More than 1 Million Erase/Write Cycles

• Data Retention > 200 years

• Packages Include 8-lead PDIP, SOIJ, SOIC,

TSSOP, DFN, Chip Scale and 14-lead TSSOP

• Pb-Free and RoHS Compliant

• Temperature Ranges:

- Industrial (I): -40C to +85C

- Automotive (E):-40C to +125C

Description:

The Microchip Technology Inc. 24AA512/24LC512/

24FC512 (24XX512*) is a 64K x 8 (512 Kbit) Serial

Electrically Erasable PROM, capable of operation

across a broad voltage range (1.7V to 5.5V). It has

been developed for advanced, low-power applications

such as personal communications and data acquisi-

tion. This device also has a page write capability of up

to 128 bytes of data. This device is capable of both

random and sequential reads up to the 512K boundary.

Functional address lines allow up to eight devices on

the same bus, for up to 4 Mbit address space. This

device is available in the standard 8-pin plastic DIP,

SOIJ, SOIC, TSSOP, DFN, and 14-lead TSSOP

packages. The 24AA512 is also available in the 8-lead

Chip Scale package.

Block Diagram

Package Type

Part

Number

VCC

Range

Max. Clock

Frequency

Temp.

Ranges

24AA512 1.7-5.5V 400 kHz

(1)

24LC512 2.5-5.5V 400 kHz I, E

24FC512 1.7-5.5V 1 MHz

(2)

Note 1: 100 kHz for VCC < 2.5V

2: 400 kHz for VCC < 2.5V

HV Generator

EEPROM

Array

Page Latches

YDEC

XDEC

Sense Amp.

R/W Control

Memory

Control

Logic

I/O

Control

Logic

I/O

A0 A1 A2

SDA

SCL

VSS

VCC

SCL

SDA

24XX512

TSSOP

SCL

SDA

24XX512

DFN

SCL

SDA

24XX512

VCC

PDIP/SOIJ/SOIC/TSSOP

Note 1: Available in I-temp, “AA” only.

CS (Chip Scale)

(1)

CC A1 A0

WP A2

SDA SCL V

(TOP DOWN VIEW,

BALLS NOT VISIBLE)

512K I

™

Serial EEPROM

* 24XX512 is used in this document as a generic part number for the 24AA512/24LC512/24FC512 devices.

Summary of content (36 pages)

PAGE 1
24AA512/24LC512/24FC512 512K I2C™ Serial EEPROM Device Selection Table Description: Part Number VCC Range Max. Clock Frequency 24AA512 1.7-5.5V 400 kHz(1) I 24LC512 2.5-5.5V 400 kHz I, E 24FC512 1.7-5.5V 1 MHz(2) I Note 1: 2: Temp. Ranges The Microchip Technology Inc. 24AA512/24LC512/ 24FC512 (24XX512*) is a 64K x 8 (512 Kbit) Serial Electrically Erasable PROM, capable of operation across a broad voltage range (1.7V to 5.5V).
PAGE 2
4AA512/24LC512/24FC512 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings (†) VCC .............................................................................................................................................................................6.5V All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V Storage temperature .................................................................
PAGE 3
24AA512/24LC512/24FC512 TABLE 1-2: AC CHARACTERISTICS Electrical Characteristics: Industrial (I): VCC = +1.7V to 5.5V Automotive (E): VCC = +2.5V to 5.5V AC CHARACTERISTICS Param. No. Sym. Characteristic Min. Max. Units TA = -40°C to +85°C TA = -40°C to +125°C Conditions 1 FCLK Clock frequency — — — — 100 400 400 1000 kHz 1.7V  VCC  2.5V 2.5V  VCC  5.5V 1.7V  VCC  2.5V 24FC512 2.5V  VCC  5.5V 24FC512 2 THIGH Clock high time 4000 600 600 500 — — — — ns 1.7V  VCC  2.5V 2.
PAGE 4
24AA512/24LC512/24FC512 AC CHARACTERISTICS (Continued) Param. No. Sym. Characteristic 16 TSP Input filter spike suppression (SDA and SCL pins) 17 TWC Write cycle time (byte or page) 18 — Endurance Note 1: 2: 3: 4: Electrical Characteristics: Industrial (I): VCC = +1.7V to 5.5V Automotive (E): VCC = +2.5V to 5.5V TA = -40°C to +85°C TA = -40°C to +125°C Min. Max. Units — 50 ns All except, 24FC512 (Notes 1 and 3) — — 5 ms 1,000,000 — cycles Conditions Page Mode, 25°C, VCC = 5.
PAGE 5
24AA512/24LC512/24FC512 FIGURE 1-1: BUS TIMING DATA 5 SCL SDA IN 7 3 4 D4 2 8 10 9 6 16 14 13 SDA OUT WP  2010 Microchip Technology Inc.
PAGE 6
24AA512/24LC512/24FC512 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1.
PAGE 7
24AA512/24LC512/24FC512 4.0 BUS CHARACTERISTICS The following bus protocol has been defined: • Data transfer may be initiated only when the bus is not busy. • During data transfer, the data line must remain stable whenever the clock line is high. Changes in the data line, while the clock line is high, will be interpreted as a Start or Stop condition. Accordingly, the following bus conditions have been defined (Figure 4-1). 4.1 Bus Not Busy (A) Both data and clock lines remain high. 4.
PAGE 8
24AA512/24LC512/24FC512 FIGURE 4-1: (A) DATA TRANSFER SEQUENCE ON THE SERIAL BUS (B) (D) Start Condition Address or Acknowledge Valid (D) (C) (A) SCL SDA FIGURE 4-2: Data Allowed to Change Stop Condition ACKNOWLEDGE TIMING Acknowledge Bit 1 SCL SDA 2 3 4 5 6 7 Data from transmitter Transmitter must release the SDA line at this point allowing the Receiver to pull the SDA line low to acknowledge the previous eight bits of data.
PAGE 9
24AA512/24LC512/24FC512 5.0 DEVICE ADDRESSING FIGURE 5-1: A control byte is the first byte received following the Start condition from the master device (Figure 5-1). The control byte consists of a 4-bit control code; for the 24XX512 this is set as ‘1010’ binary for read and write operations. The next three bits of the control byte are the Chip Select bits (A2, A1 and A0). The Chip Select bits allow the use of up to eight 24XX512 devices on the same bus and are used to select which device is accessed.
PAGE 10
24AA512/24LC512/24FC512 6.0 WRITE OPERATIONS 6.1 Byte Write Following the Start condition from the master, the control code (four bits), the Chip Select (three bits) and the R/W bit (which is a logic low) are clocked onto the bus by the master transmitter. This indicates to the addressed slave receiver that the address high byte will follow after it has generated an Acknowledge bit during the ninth clock cycle.
PAGE 11
24AA512/24LC512/24FC512 FIGURE 6-1: BYTE WRITE S T A R T Bus Activity Master Control Byte Address Low Byte S T O P Data AA S1 01 0A 2 10 0 SDA Line P A C K Bus Activity FIGURE 6-2: Address High Byte A C K A C K A C K PAGE WRITE Bus Activity Master S T A R T SDA Line AAA S101 02 1 00 Control Byte Bus Activity  2010 Microchip Technology Inc.
PAGE 12
24AA512/24LC512/24FC512 7.0 ACKNOWLEDGE POLLING Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the Stop condition for a Write command has been issued from the master, the device initiates the internally timed write cycle. ACK polling can be initiated immediately. This involves the master sending a Start condition, followed by the control byte for a Write command (R/W = 0).
PAGE 13
24AA512/24LC512/24FC512 8.0 READ OPERATION 8.3 Read operations are initiated in the same way as write operations with the exception that the R/W bit of the control byte is set to ‘1’. There are three basic types of read operations: current address read, random read and sequential read. 8.1 Current Address Read The 24XX512 contains an address counter that maintains the address of the last word accessed, internally incremented by ‘1’.
PAGE 14
24AA512/24LC512/24FC512 FIGURE 8-2: Bus Activity Master SDA Line RANDOM READ S T A R T Control Byte Address High Byte S1 01 0 AAA0 2 1 0 A C K Bus Activity S T A R T Address Low Byte Control Byte S 1 0 1 0 A A A1 2 1 0 A C K A C K Data (n + 1) Data (n + 2) S T O P Data Byte P N O A C K A C K x = “don’t care” bit FIGURE 8-3: Bus Activity Master SEQUENTIAL READ Control Byte Data (n) S T O P Data (n + x) P SDA Line Bus Activity DS21754M-page 14 A C K A C K A C K A C K N O A C K
PAGE 15
24AA512/24LC512/24FC512 9.0 PACKAGING INFORMATION 9.1 Package Marking Information 8-Lead PDIP (300 mil) 24AA512 I/P e3 017 0510 XXXXXXXX T/XXXNNN YYWW 8-Lead SOIJ (5.28 mm) XXXXXXXX T/XXXXXX YYWWNNN 8-Lead DFN-S XXXXXXX T/XXXXX YYWW NNN Legend: XX...
PAGE 16
24AA512/24LC512/24FC512 Package Marking Information (Continued) 8-Lead SOIC (3.90 mm) Example: XXXXXXXT XXXXYYWW 24LC512I SNMe3 0510 NNN 017 8-Lead TSSOP Example XXXX 4LE TYWW I510 NNN 017 Example 14-Lead TSSOP XXXXXXXT 4L512I YYWW 0510 NNN 017 8-Lead Chip Scale Example: XXXXXXX YYWWNNN 24AA512 0810017 First Line Marking Codes Part No. 24AA512 8- Lead TSSOP Package Codes 4AE 24LC512 4LE 24FC512 4FE DS21754M-page 16  2010 Microchip Technology Inc.
PAGE 17
24AA512/24LC512/24FC512 /HDG 3ODVWLF 'XDO ,Q /LQH 3 ± PLO %RG\ >3',3@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ N NOTE 1 E1 1 3 2 D E A2 A L A1 c e eB b1 b 8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV ,1&+(6 0,1 1 120 0$; 3LWFK H 7RS WR 6HDWLQJ 3ODQH $ ± ± 0ROGHG 3DFNDJH 7KLFNQHVV $ %DVH WR 6HDWLQJ 3ODQH $ ± ± 6KRXOGHU WR 6KRXOGHU :LGWK (
PAGE 18
24AA512/24LC512/24FC512 /HDG 3ODVWLF 6PDOO 2XWOLQH 61 ± 1DUURZ PP %RG\ >62,&@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ D e N E E1 NOTE 1 1 2 3 α h b h A2 A c φ L A1 β L1 8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV 0,//,0(7(56 0,1 1 120 0$; 3LWFK H 2YHUDOO +HLJKW $ ± %6& ± 0ROGHG 3DFNDJH 7KLFNQHVV $ ± ± 6WDQGRII $ ± 2YHUDOO :LGWK ( 0ROGHG 3
PAGE 19
24AA512/24LC512/24FC512 /HDG 3ODVWLF 6PDOO 2XWOLQH 61 ± 1DUURZ PP %RG\ >62,&@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ  2010 Microchip Technology Inc.
PAGE 20
24AA512/24LC512/24FC512 /HDG 3ODVWLF 6PDOO 2XWOLQH 60 ± 0HGLXP PP %RG\ >62,-@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ D N E E1 1 2 e b α c φ A2 A β A1 8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV L 0,//,0(7(56 0,1 1 120 0$; 3LWFK H 2YHUDOO +HLJKW $ %6& ± 0ROGHG 3DFNDJH 7KLFNQHVV $ ± 6WDQGRII $ ± 2YHUDOO :LGWK ( ± 0ROGHG
PAGE 21
24AA512/24LC512/24FC512 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2010 Microchip Technology Inc.
PAGE 22
24AA512/24LC512/24FC512 /HDG 3ODVWLF 7KLQ 6KULQN 6PDOO 2XWOLQH 67 ± PP %RG\ >76623@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ D N E E1 NOTE 1 1 2 b e c A φ A2 A1 L L1 8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV 0,//,0(7(56 0,1 1 120 0$; 3LWFK H 2YHUDOO +HLJKW $ ± %6& ± 0ROGHG 3DFNDJH 7KLFNQHVV $ 6WDQGRII $ ± 2YHUDOO :LGWK ( 0ROGHG
PAGE 23
24AA512/24LC512/24FC512 /HDG 3ODVWLF 7KLQ 6KULQN 6PDOO 2XWOLQH 67 ± PP %RG\ >76623@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ D N E E1 NOTE 1 1 2 e b c φ A2 A A1 8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV L L1 0,//,0(7(56 0,1 1 120 0$; 3LWFK H 2YHUDOO +HLJKW $ ± %6& ± 0ROGHG 3DFNDJH 7KLFNQHVV $ 6WDQGRII $ ± 2YHUDOO :LGWK ( 0ROGHG 3DF
PAGE 24
AA512/24LC512/24FC512 /HDG 3ODVWLF 'XDO )ODW 1R /HDG 3DFNDJH 0) ± [ PP %RG\ >')1 6@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ e D L b N N K E2 E EXPOSED PAD NOTE 1 1 2 2 NOTE 1 1 D2 BOTTOM VIEW TOP VIEW A A3 A1 NOTE 2 8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV 0,//,0(7(56 0,1 1 120 0$; 3LWFK H 2YHUDOO +HLJKW $ %6& 6WDQGRII $ &RQW
PAGE 25
24AA512/24LC512/24FC512 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ  2010 Microchip Technology Inc.
PAGE 26
24AA512/24LC512/24FC512 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21754M-page 26  2010 Microchip Technology Inc.
PAGE 27
24AA512/24LC512/24FC512 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2010 Microchip Technology Inc.
PAGE 28
24AA512/24LC512/24FC512 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21754M-page 28  2010 Microchip Technology Inc.
PAGE 29
24AA512/24LC512/24FC512 APPENDIX A: REVISION HISTORY Revision D Correction to Section 1.0, Electrical Characteristics. Revision E Correction to Section 1.0., Ambient Temperature Correction to Section 6.2, Page Write Revision F Add E3 (Pb-free) to marking examples. Updated Marking Legend and On-line Support. Revision G Revised Sections 2.1, 2.4 and 6.3. Revision H Revised Features section; Revised 1.8V voltage to 1.7V; Replaced Package Drawings; Revised Product ID System; Removed 14 Lead TSSOP.
PAGE 30
24AA512/24LC512/24FC512 NOTES: DS21754M-page 30  2010 Microchip Technology Inc.
PAGE 31
24AA512/24LC512/24FC512 THE MICROCHIP WEB SITE CUSTOMER SUPPORT Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers.
PAGE 32
24AA512/24LC512/24FC512 READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document.
PAGE 33
24AA512/24LC512/24FC512 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X Device Device: /XX Temperature Range 24AA512: 24AA512T: 24LC512: 24LC512T: 24FC512: 24FC512T: Temperature Range: I E Package: P SM MF = = Package 512 Kbit 1.8V I2C Serial EEPROM 512 Kbit 1.8V I2C Serial EEPROM (Tape and Reel) 512 Kbit 2.5V I2C Serial EEPROM 512 Kbit 2.
PAGE 34
24AA512/24LC512/24FC512 NOTES: DS21754M-page34  2010 Microchip Technology Inc.
PAGE 35
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
PAGE 36
WORLDWIDE SALES AND SERVICE AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.