Datasheet

ManualsBrandsMicrochip ManualsEEPROMEEPROM 64KB 900ns SOT-23

 1997-2012 Microchip Technology Inc. DS21189T-page 1

24AA64/24LC64/24FC64

Device Selection Table

Features:

• Single-Supply with Operation down to 1.7V for

24AA64/24FC64 Devices, 2.5V for 24LC64

Devices

• Low-Power CMOS Technology:

- Active current 3 mA, max.

- Standby current 1 A, max.

• 2-Wire Serial Interface, I

C™ Compatible

• Packages with 3 Address Pins are Cascadable up

to 8 Devices

• Schmitt Trigger Inputs for Noise Suppression

• Output Slope Control to Eliminate Ground Bounce

• 100 kHz and 400 kHz Clock Compatibility

• 1 MHz Clock for FC versions

• Page Write Time 5 ms, max.

• Self-timed Erase/Write Cycle

• 32-Byte Page Write Buffer

• Hardware Write-Protect

• ESD Protection > 4,000V

• More than 1 Million Erase/Write Cycles

• Data Retention > 200 Years

• Factory Programming Available

• Packages include 8-lead PDIP, SOIC, SOIJ,

TSSOP, X-Rotated TSSOP, MSOP, DFN, TDFN,

5-lead SOT-23 or Chip Scale

• Pb-Free and RoHS Compliant

• Temperature Ranges:

- Industrial (I): -40°C to +85°C

- Automotive (E): -40°C to +125°C

Description:

The Microchip Technology Inc. 24AA64/24LC64/

24FC64 (24XX64*) is a 64 Kbit Electrically Erasable

PROM. The device is organized as a single block of

8K x 8-bit memory with a 2-wire serial interface. Low-

voltage design permits operation down to 1.7V, with

standby and active currents of only 1 A and 3 mA,

respectively. It has been developed for advanced, low-

power applications such as personal communications

or data acquisition. The 24XX64 also has a page write

capability for up to 32 bytes of data. Functional

address lines allow up to eight devices on the same

bus, for up to 512 Kbits address space. The 24XX64 is

available in the standard 8-pin PDIP, surface mount

SOIC, SOIJ, TSSOP, DFN, TDFN and MSOP

packages. The 24XX64 is also available in the 5-lead

SOT-23, and Chip Scale packages.

Block Diagram

Package Types

Part

Number

VCC

Range

Max. Clock

Frequency

Temp.

Ranges

24AA64 1.7-5.5 400 kHz

(1)

I, E

24LC64 2.5-5.5 400 kHz I, E

24FC64 1.7-5.5 1 MHz

(2)

Note 1: 100 kHz for V

CC <2.5V.

2: 400 kHz for V

CC <2.5V.

EEPROM

Array

Page

YDEC

XDEC

Sense Amp.

Memory

Control

Logic

I/O

Control

Logic

I/O

SDA

SCL

VSS

R/W Control

Latches

Generator

A2A1A0

SCL

SDA

PDIP/MSOP/SOIC/SOIJ/TSSOP

DFN/TDFN

SCL

SDA

SOT-23

SCL

SDA

CS (Chip Scale)

(1)

SDA

SCL

(Top Down View,

Balls Not Visible)

Note 1: Available in I-temp, “AA” only.

X-Rotated TSSOP

SCL

SDA

(X/ST)

64K I

C™ Serial EEPROM

* 24XX64 is used in this document as a generic part number for the 24AA64/24LC64/24FC64 devices.

Summary of content (44 pages)

PAGE 1
24AA64/24LC64/24FC64 64K I2C™ Serial EEPROM Device Selection Table Part Number VCC Range Max. Clock Frequency Temp. Ranges 24AA64 1.7-5.5 400 kHz(1) I, E 24LC64 2.5-5.5 400 kHz I, E 1.7-5.5 (2) 24FC64 Note 1: 2: 1 MHz • Pb-Free and RoHS Compliant • Temperature Ranges: - Industrial (I): -40°C to +85°C - Automotive (E): -40°C to +125°C Description: The Microchip Technology Inc. 24AA64/24LC64/ 24FC64 (24XX64*) is a 64 Kbit Electrically Erasable PROM.
PAGE 2
4AA64/24LC64/24FC64 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings (†) VCC .............................................................................................................................................................................6.5V All inputs and outputs w.r.t. VSS ......................................................................................................... -0.3V to VCC +1.0V Storage temperature ....................................................................
PAGE 3
24AA64/24LC64/24FC64 TABLE 1-2: AC CHARACTERISTICS Electrical Characteristics: Industrial (I): VCC = +1.7V to 5.5V TA = -40°C to +85°C Automotive (E): VCC = +1.7V to 5.5V TA = -40°C to 125°C AC CHARACTERISTICS Param. No. Sym. Characteristic Min. Max. Units Conditions 1 FCLK Clock frequency — — — — 100 400 400 1000 kHz 1.7V  VCC  2.5V 2.5V  VCC  5.5V 1.7V  VCC  2.5V 24FC64 2.5V  VCC  5.5V 24FC64 2 THIGH Clock high time 4000 600 600 500 — — — — ns 1.7V  VCC  2.5V 2.
PAGE 4
24AA64/24LC64/24FC64 Electrical Characteristics: Industrial (I): VCC = +1.7V to 5.5V TA = -40°C to +85°C Automotive (E): VCC = +1.7V to 5.5V TA = -40°C to 125°C AC CHARACTERISTICS Param. No. Sym. Characteristic Min. Max. Units Conditions — — — — 3500 900 900 400 ns 1.7V  VCC  2.5V 2.5V  VCC  5.5V 1.7V  VCC  2.5V 24FC64 2.5V  VCC  5.5V 24FC64 4700 1300 1300 500 — — — — ns 1.7V  VCC  2.5V 2.5V  VCC  5.5V 1.7V  VCC  2.5V 24FC64 2.5V  VCC  5.5V 24FC64 10 + 0.
PAGE 5
24AA64/24LC64/24FC64 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1.
PAGE 6
24AA64/24LC64/24FC64 4.0 BUS CHARACTERISTICS The following bus protocol has been defined: • Data transfer may be initiated only when the bus is not busy • During data transfer, the data line must remain stable whenever the clock line is high. Changes in the data line while the clock line is high will be interpreted as a Start or Stop condition The data on the line must be changed during the low period of the clock signal. There is one clock pulse per bit of data.
PAGE 7
24AA64/24LC64/24FC64 5.0 DEVICE ADDRESSING A control byte is the first byte received following the Start condition from the master device (Figure 5-1). The control byte consists of a four-bit control code. For the 24XX64, this is set as ‘1010’ binary for read and write operations. The next three bits of the control byte are the Chip Select bits (A2, A1, A0). The Chip Select bits allow the use of up to eight 24XX64 devices on the same bus and are used to select which device is accessed.
PAGE 8
24AA64/24LC64/24FC64 6.0 WRITE OPERATIONS 6.1 Byte Write Following the Start condition from the master, the control code (four bits), the Chip Select (three bits) and the R/W bit (which is a logic low) are clocked onto the bus by the master transmitter. This indicates to the addressed slave receiver that the address high byte will follow once it has generated an Acknowledge bit during the ninth clock cycle.
PAGE 9
24AA64/24LC64/24FC64 FIGURE 6-1: BYTE WRITE S T A R T Bus Activity Master Control Byte Address High Byte AA S1 01 0A 2 10 0 SDA Line S T O P Data xxx P A C K Bus Activity Address Low Byte A C K A C K A C K x = “don’t care” bit FIGURE 6-2: PAGE WRITE Bus Activity Master S T A R T SDA Line AA S 10 10A 2 1 0 0 Control Byte Bus Activity Address High Byte Address Low Byte Data Byte 0 S T O P Data Byte 31 P xxx A C K A C K A C K A C K A C K x = “don’t care” bit  1997-2012 Mi
PAGE 10
24AA64/24LC64/24FC64 7.0 ACKNOWLEDGE POLLING Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the Stop condition for a Write command has been issued from the master, the device initiates the internally-timed write cycle and ACK polling can then be initiated immediately. This involves the master sending a Start condition followed by the control byte for a Write command (R/W = 0).
PAGE 11
24AA64/24LC64/24FC64 8.0 READ OPERATION Read operations are initiated in the same way as write operations, with the exception that the R/W bit of the control byte is set to one. There are three basic types of read operations: current address read, random read and sequential read. 8.1 Current Address Read The 24XX64 contains an address counter that maintains the address of the last word accessed, internally incremented by one.
PAGE 12
24AA64/24LC64/24FC64 FIGURE 8-2: Bus Activity Master SDA Line RANDOM READ S T A R T Control Byte Address High Byte S1 01 0AAA0 2 1 0 xxx A C K A C K Bus Activity S T A R T Address Low Byte A C K Control Byte S 1 0 1 0 A AA1 2 10 S T O P Data Byte P N O A C K A C K x = “don’t care” bit FIGURE 8-3: Bus Activity Master SEQUENTIAL READ Control Byte Data n Data n + 1 Data n + 2 S T O P Data n + x P SDA Line Bus Activity DS21189T-page 12 A C K A C K A C K A C K N O A C K  1997-2
PAGE 13
24AA64/24LC64/24FC64 9.0 PACKAGING INFORMATION 9.1 Package Marking Information 8-Lead PDIP (300 mil) XXXXXXXX T/XXXNNN YYWW 8-Lead SOIC (3.90 mm) Example: 24LC64 I/P e3 13F 0527 Example: 24LC64I SN e3 0527 13F XXXXXXXT XXXXYYWW NNN 8-Lead SOIC (5.28 mm) Example: 24LC64 I/SM e3 052713F XXXXXXXX T/XXXXXX YYWWNNN 8-Lead TSSOP Example: XXXX 4LB TYWW I527 NNN 13F 8-Lead MSOP Example: XXXXXT 4L64I YWWNNN 52713F 8-Lead 2x3 DFN XXX YWW NN  1997-2012 Microchip Technology Inc.
PAGE 14
24AA64/24LC64/24FC64 8-Lead 2x3 TDFN Example: XXX YWW NN A74 527 I3 5-Lead SOT-23 Example: XXNN 7GNN 5-Lead Chip Scale Example: 75 13 XW NN 1st Line Marking Codes Part Number TSSOP TSSOP X-Rotated MSOP 4AB 4ABX 4A64T 24LC64 4LB 4LBX 24FC64 4FB — 24AA64 Note: DFN TDFN SOT-23 I Temp. E Temp. I Temp. E Temp. I Temp. E Temp. 271 — A71 E10 7HNN 7WNN 4L64T 274 275 A74 A75 7GNN 7JNN 4F64T 27A — A7A — — — T = Temperature grade (I, E) Legend: XX...
PAGE 15
24AA64/24LC64/24FC64 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 N NOTE 1 E1 1 3 2 D E A2 A L A1 c e eB b1 b 6 &! ' ! 9 ' &! 7"') % ! 7,8. 7 7 & ; < & & 7: 1 , = = - 1 ! & & = = .
PAGE 16
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21189T-page 16  1997-2012 Microchip Technology Inc.
PAGE 17
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  1997-2012 Microchip Technology Inc.
PAGE 18
24AA64/24LC64/24FC64 ! "" #$ %& ! ' 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 DS21189T-page 18  1997-2012 Microchip Technology Inc.
PAGE 19
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  1997-2012 Microchip Technology Inc.
PAGE 20
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21189T-page 20  1997-2012 Microchip Technology Inc.
PAGE 21
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  1997-2012 Microchip Technology Inc.
PAGE 22
24AA64/24LC64/24FC64 ( ! )" " !) !) * 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 b N E E1 3 2 1 e e1 D A2 A c φ A1 L L1 6 &! ' ! 9 ' &! 7"') % ! 99 . . 7 7: ; 7 9 # & 1 , :"&! # 9 # & : 8 & = < = - = : > #& . = - # # 4 > #& .
PAGE 23
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  1997-2012 Microchip Technology Inc.
PAGE 24
AA64/24LC64/24FC64 )+ +" , ! ) -%- ) ! 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 D N E E1 NOTE 1 1 2 b e c A φ A2 A1 L L1 6 &! ' ! 9 ' &! 7"') % ! 99 . . 7 7 7: ; < & : 8 & = = < = # # 4 4 !! & # %% ? 1 , : > #& .
PAGE 25
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  1997-2012 Microchip Technology Inc.
PAGE 26
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21189T-page 26  1997-2012 Microchip Technology Inc.
PAGE 27
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  1997-2012 Microchip Technology Inc.
PAGE 28
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21189T-page 28  1997-2012 Microchip Technology Inc.
PAGE 29
24AA64/24LC64/24FC64 . $ , / 0' *1 1 %& . 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4 e D b N N L K E2 E EXPOSED PAD NOTE 1 NOTE 1 2 1 2 1 D2 BOTTOM VIEW TOP VIEW A A3 A1 NOTE 2 6 &! ' ! 9 ' &! 7"') % ! 99 . .
PAGE 30
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21189T-page 30  1997-2012 Microchip Technology Inc.
PAGE 31
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  1997-2012 Microchip Technology Inc.
PAGE 32
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21189T-page 32  1997-2012 Microchip Technology Inc.
PAGE 33
24AA64/24LC64/24FC64 . $ , / 0 *1 1 %2( ) . 3 & ' !& " & 4 # * !( ! ! & 4 % & & # & && 255*** ' '5 4  1997-2012 Microchip Technology Inc.
PAGE 34
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21189T-page 34  1997-2012 Microchip Technology Inc.
PAGE 35
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Please contact your local Microchip representative for specific details.  1997-2012 Microchip Technology Inc.
PAGE 36
24AA64/24LC64/24FC64 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21189T-page 36  1997-2012 Microchip Technology Inc.
PAGE 37
24AA64/24LC64/24FC64 APPENDIX A: REVISION HISTORY Revision H (12/2003) Corrections to Section 1.0, Electrical Characteristics. Revision J (04/2005) Added DFN package. Revision K (08/2005) Revised Sections 7.1 and 7.4. Revision L (03/2007) Added 24FC64 Part; Revised Device Selection Table; Revised Features Section; Deleted Rotated TSSOP Package; Revised Table 1-2; Revised Table 7-1; Revised Package Information; Replaced Package Drawings; Revised Product ID Section.
PAGE 38
24AA64/24LC64/24FC64 NOTES: DS21189T-page 38  1997-2012 Microchip Technology Inc.
PAGE 39
24AA64/24LC64/24FC64 THE MICROCHIP WEB SITE CUSTOMER SUPPORT Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers.
PAGE 40
24AA64/24LC64/24FC64 READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document.
PAGE 41
24AA64/24LC64/24FC64 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X /XX Temperature Package Range 1.7V, 64 Kbit I2C™ Serial EEPROM 1.7V, 64 Kbit I2C Serial EEPROM (Tape and Reel) 24AA64X: 1.7V, 64 Kbit I2C Serial EEPROM in alternate pinout (ST only) 24AA64XT: 1.7V, 64 KbitI2C Serial EEPROM in alternate pinout (ST only) 24LC64: 2.5V, 64 Kbit I2C Serial EEPROM 24LC64T: 2.
PAGE 42
24AA64/24LC64/24FC64 NOTES: DS21189T-page 42  1997-2012 Microchip Technology Inc.
PAGE 43
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
PAGE 44
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