Datasheet

PIC24FJ256GA110 FAMILY
DS30009905F-page 104  2007-2019 Microchip Technology Inc.
REGISTER 7-27: IPC10: INTERRUPT PRIORITY CONTROL REGISTER 10
U-0 R/W-1 R/W-0 R/W-0 U-0 R/W-1 R/W-0 R/W-0
— OC7IP2 OC7IP1 OC7IP0 — OC6IP2 OC6IP1 OC6IP0
bit 15 bit 8
U-0 R/W-1 R/W-0 R/W-0 U-0 R/W-1 R/W-0 R/W-0
— OC5IP2 OC5IP1 OC5IP0 — IC6IP2 IC6IP1 IC6IP0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as ‘0’
bit 14-12 OC7IP[2:0]: Output Compare Channel 7 Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
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•
•
001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 11 Unimplemented: Read as ‘0’
bit 10-8 OC6IP[2:0]: Output Compare Channel 6 Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
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•
•
001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 7 Unimplemented: Read as ‘0’
bit 6-4 OC5IP[2:0]: Output Compare Channel 5 Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
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•
•
001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 3 Unimplemented: Read as ‘0’
bit 2-0 IC6IP[2:0]: Input Capture Channel 6 Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is Priority 1
000 = Interrupt source is disabled