Datasheet

PIC24FJ256GA110 FAMILY
DS30009905F-page 124  2007-2019 Microchip Technology Inc.
8.5 Reference Clock Output
In addition to the CLKO output (FOSC/2) available in
certain oscillator modes, the device clock in the
PIC24FJ256GA110 family devices can also be config-
ured to provide a reference clock output signal to a port
pin. This feature is available in all oscillator configura-
tions and allows the user to select a greater range of
clock submultiples to drive external devices in the
application.
This reference clock output is controlled by the
REFOCON register (Register 8-4). Setting the ROEN
bit (REFOCON[15]) makes the clock signal available
on the REFO pin. The RODIVx bits (REFOCON[11:8])
enable the selection of 16 different clock divider
options.
The ROSSLP and ROSEL bits (REFOCON[13:12]) con-
trol the availability of the reference output during Sleep
mode. The ROSEL bit determines if the oscillator on
OSC1 and OSC2, or the current system clock source, is
used for the reference clock output. The ROSSLP bit
determines if the reference source is available on REFO
when the device is in Sleep mode.
To use the reference clock output in Sleep mode, both
the ROSSLP and ROSEL bits must be set. The device
clock must also be configured for one of the Primary
Oscillator modes (EC, HS or XT); otherwise, if the
POSCEN bit is also not set, the oscillator on OSC1 and
OSC2 will be powered down when the device enters
Sleep mode. Clearing the ROSEL bit allows the refer-
ence output frequency to change as the system clock
changes during any clock switches.