Datasheet
2007-2019 Microchip Technology Inc. DS30009905F-page 189
PIC24FJ256GA110 FAMILY
16.4 Setting Baud Rate When
Operating as a Bus Master
To compute the Baud Rate Generator reload value, use
Equation 16-1.
EQUATION 16-1: COMPUTING BAUD RATE
RELOAD VALUE
(1,2)
16.5 Slave Address Masking
The I2CxMSK register (Register 16-3) designates
address bit positions as “don’t care” for both 7-Bit and
10-Bit Addressing modes. Setting a particular bit loca-
tion (= 1) in the I2CxMSK register causes the slave
module to respond whether the corresponding address
bit value is a ‘0’ or a ‘1’. For example, when I2CxMSK
is set to ‘00010000’, the slave module will detect both
addresses: ‘0000000’ and ‘0010000’.
To enable address masking, the IPMI (Intelligent
Peripheral Management Interface) must be disabled by
clearing the IPMIEN bit (I2CxCON[11]).
TABLE 16-1: I
2
C CLOCK RATES
(1,2)
TABLE 16-2: I
2
C RESERVED ADDRESSES
(1)
I2CxBRG
F
CY
FSCL
------------
F
CY
10 000 000
------------------------------–
1–=
F
SCL
FCY
I2CxBRG 1
FCY
10 000 000
------------------------------
++
----------------------------------------------------------------------=
or
Note 1: Based on FCY = FOSC/2; Doze mode and PLL
are disabled.
2: These clock rate values are for guidance only.
The actual clock rate can be affected by various
system-level parameters. The actual clock rate
should be measured in its intended application.
Note: As a result of changes in the I
2
C protocol,
the addresses in Ta b l e 16- 2 are reserved
and will not be Acknowledged in Slave
mode. This includes any address mask
settings that include any of these
addresses.
Required System
F
SCL
FCY
I2CxBRG Value
Actual
F
SCL
(Decimal) (Hexadecimal)
100 kHz 16 MHz 157 9D 100 kHz
100 kHz 8 MHz 78 4E 100 kHz
100 kHz 4 MHz 39 27 99 kHz
400 kHz 16 MHz 37 25 404 kHz
400 kHz 8 MHz 18 12 404 kHz
400kHz 4MHz 9 9 385kHz
400kHz 2MHz 4 4 385kHz
1 MHz 16 MHz 13 D 1.026 MHz
1MHz 8MHz 6 6 1.026MHz
1MHz 4MHz 3 3 0.909MHz
Note 1: Based on F
CY = FOSC/2; Doze mode and PLL are disabled.
2: These clock rate values are for guidance only. The actual clock rate can be affected by various
system-level parameters. The actual clock rate should be measured in its intended application.
Slave Address R/W
Bit Description
0000 000 0 General Call Address
(2)
0000 000 1 Start Byte
0000 001 x Cbus Address
0000 010 x Reserved
0000 011 x Reserved
0000 1xx x HS Mode Master Code
1111 1xx x Reserved
1111 0xx x 10-Bit Slave Upper Byte
(3)
Note 1: The address bits listed here will never cause an address match, independent of address mask settings.
2: The address will be Acknowledged only if GCEN = 1.
3: Match on this address can only occur on the upper byte in 10-Bit Addressing mode.