Datasheet
PIC24FJ256GA110 FAMILY
DS30009905F-page 230 2007-2019 Microchip Technology Inc.
REGISTER 21-2: AD1CON2: A/D CONTROL REGISTER 2
R/W-0 R/W-0 R/W-0 r-0 U-0 R/W-0 U-0 U-0
VCFG2 VCFG1 VCFG0 — — CSCNA — —
bit 15 bit 8
R-0
U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
BUFS
— SMPI3 SMPI2 SMPI1 SMPI0 BUFM ALTS
bit 7 bit 0
Legend: r = Reserved bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-13 VCFG[2:0]: Voltage Reference Configuration bits
bit 12 Reserved: Maintain as ‘0’
bit 11 Unimplemented: Read as ‘0’
bit 10 CSCNA: Scan Input Selections for S/H Positive Input for MUX A Input Multiplexer Setting bit
1 = Scans inputs
0 = Does not scan inputs
bit 9-8 Unimplemented: Read as ‘0’
bit 7 BUFS: Buffer Fill Status bit (valid only when BUFM = 1)
1 = A/D is currently filling Buffer 08-0F, user should access data in 00-07
0 = A/D is currently filling Buffer 00-07, user should access data in 08-0F
bit 6 Unimplemented: Read as ‘0’
bit 5-2 SMPI[3:0]: Sample/Convert Sequences Per Interrupt Selection bits
1111 = Interrupts at the completion of conversion for each 16th sample/convert sequence
1110 = Interrupts at the completion of conversion for each 15th sample/convert sequence
...
0001 = Interrupts at the completion of conversion for each 2nd sample/convert sequence
0000 = Interrupts at the completion of conversion for each sample/convert sequence
bit 1 BUFM: Buffer Mode Select bit
1 = Buffer configured as two 8-word buffers (ADC1BUFn[15:8] and ADC1BUFn[7:0])
0 = Buffer configured as one 16-word buffer (ADC1BUFn[15:0])
bit 0 ALTS: Alternate Input Sample Mode Select bit
1 = Uses MUX A input multiplexer settings for first sample, then alternates between MUX B and MUX A
input multiplexer settings for all subsequent samples
0 = Always uses MUX A input multiplexer settings
VCFG[2:0] VR+VR-
000 AV
DD AVSS
001 External VREF+ Pin AVSS
010 AVDD External VREF- Pin
011 External VREF+ Pin External VREF- Pin
1xx AVDD AVSS