Datasheet

 2007-2019 Microchip Technology Inc. DS30009905F-page 231
PIC24FJ256GA110 FAMILY
REGISTER 21-3: AD1CON3: A/D CONTROL REGISTER 3
R/W-0 r-0 r-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ADRC — — SAMC[4:0]
bit 15 bit 8
R/W
-0 R/W -0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ADCS[7:0]
bit 7 bit 0
Legend: r = Reserved bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 ADRC: A/D Conversion Clock Source bit
1 = A/D internal RC clock
0 = Clock derived from system clock
bit 14-13 Reserved: Maintain as ‘0’
bit 12-8 SAMC[4:0]: Auto-Sample Time bits
11111 = 31 T
AD
···
00001 = 1 T
AD
00000 = 0 TAD (not recommended)
bit 7-0 ADCS[7:0]: A/D Conversion Clock Select bits
11111111
··· = Reserved, do not use
01000000
00111111 = 64 T
CY
00111110 = 63 TCY
···
00000001 = 2 * T
CY
00000000 = TCY