Datasheet

2015 Microchip Technology Inc. Preliminary DS60001320B-page 267
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
TABLE 12-13: PORTF REGISTER MAP FOR 100-PIN, 124-PIN, AND 144-PIN DEVICES ONLY
Virtual Address
(BF86_#)
Register
Name
(1)
Bit Range
Bits
All
Resets
31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0
0500 ANSELF
31:16 0000
15:0 ANSF13 ANSF12 3000
0510 TRISF
31:16 0000
15:0 TRISF13 TRISF12 TRISF8 TRISF5 TRISF4 TRISF3 TRISF2 TRISF1 TRISF0 313F
0520 PORTF
31:16 0000
15:0 RF13 RF12 RF8 RF5 RF4 RF3 RF2 RF1 RF0 xxxx
0530 LATF
31:16 0000
15:0 LATF13 LATF12 LATF8 LATF5 LATF4 LATF3 LATF2 LATF1 LATF0 xxxx
0540 ODCF
31:16 0000
15:0 ODCF13 ODCF12 ODCF8 ODCF5 ODCF4 ODCF3 ODCF2 ODCF1 ODCF0 0000
0550 CNPUF
31:16 0000
15:0 CNPUF13 CNPUF12 CNPUF8 CNPUF5 CNPUF4 CNPUF3 CNPUF2 CNPUF1 CNPUF0 0000
0560 CNPDF
31:16 0000
15:0 CNPDF13 CNPDF12 CNPDF8 CNPDF5 CNPDF4 CNPDF3 CNPDF2 CNPDF1 CNPDF0 0000
0570 CNCONF
31:16 0000
15:0 ON SIDL
EDGE
DETECT
0000
0580 CNENF
31:16 0000
15:0 CNENF13 CNENF12 CNENF8 CNENF5 CNENF4 CNENF3 CNENF2 CNENF1 CNENF0 0000
0590 CNSTATF
31:16 0000
15:0
CN
STATF13
CN
STATF12
CN
STATF8
CN
STATF5
CN
STATF4
CN
STATF3
CN
STATF2
CN
STATF1
CN
STATF0
0000
05A0 CNNEF
31:16 0000
15:0 CNNEF13 CNNEF12 CNNEF8 CNNEF5 CNNEF4 CNNEF3 CNNEF2 CNNEF1 CNNEF0 0000
05B0 CNFF
31:16 0000
15:0 CNFF13 CNFF12 CNFF8 CNFF5 CNFF4 CNFF3 CNFF2 CNFF1 CNFF0 0000
05C0 SRCON0F
31:16 0000
15:0 SR0F1 SR0F0 0000
05D0 SRCON1F
31:16 0000
15:0 SR1F1 SR1F0 0000
Legend: x = Unknown value on Reset; — = Unimplemented, read as ‘0’; Reset values are shown in hexadecimal.
Note 1: All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See Section 12.3 “CLR, SET, and INV Registers” for
more information.