Datasheet
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 396 Preliminary 2015 Microchip Technology Inc.
bit 10-9 RTCCLKSEL<1:0>: RTCC Clock Select bits
When a new value is written to these bits, the Seconds Value register should also be written to properly
reset the clock prescalers in the RTCC.
11 = Reserved
10 = Reserved
01 = RTCC uses the external 32.768 kHz Secondary Oscillator (SOSC)
00 = RTCC uses the internal 32 kHz oscillator (LPRC)
bit 8-7 RTCOUTSEL<1:0>: RTCC Output Data Select bits
(2)
11 = Reserved
10 = RTCC Clock is presented on the RTCC pin
01 = Seconds Clock is presented on the RTCC pin
00 = Alarm Pulse is presented on the RTCC pin when the alarm interrupt is triggered
bit 6 RTCCLKON: RTCC Clock Enable Status bit
(5)
1 = RTCC Clock is actively running
0 = RTCC Clock is not running
bit 5-4 Unimplemented: Read as ‘0’
bit 3 RTCWREN: Real-Time Clock Value Registers Write Enable bit
(3)
1 = Real-Time Clock Value registers can be written to by the user
0 = Real-Time Clock Value registers are locked out from being written to by the user
bit 2 RTCSYNC: Real-Time Clock Value Registers Read Synchronization bit
1 = Real-time clock value registers can change while reading (due to a rollover ripple that results in an invalid
data read). If the register is read twice and results in the same data, the data can be assumed to be valid.
0 = Real-time clock value registers can be read without concern about a rollover ripple
bit 1 HALFSEC: Half-Second Status bit
(4)
1 = Second half period of a second
0 = First half period of a second
bit 0 RTCOE: RTCC Output Enable bit
1 = RTCC output is enabled
0 = RTCC output is not enabled
REGISTER 25-1: RTCCON: REAL-TIME CLOCK AND CALENDAR CONTROL REGISTER
Note 1: The ON bit is only writable when RTCWREN = 1.
2: Requires RTCOE = 1 (RTCCON<0>) for the output to be active.
3: The RTCWREN bit can be set only when the write sequence is enabled.
4: This bit is read-only. It is cleared to ‘0’ on a write to the seconds bit fields (RTCTIME<14:8>).
5: This bit is undefined when RTCCLKSEL<1:0> = 00 (LPRC is the clock source).
Note: This register is reset only on a Power-on Reset (POR).