Datasheet

 2015 Microchip Technology Inc. Preliminary DS60001320B-page 459
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
REGISTER 28-10: ADCCSS1: ADC COMMON SCAN SELECT REGISTER 1
Bit Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CSS31
(1)
CSS30
(1)
CSS29
(1)
CSS28
(1)
CSS27
(1)
CSS26
(1)
CSS25
(1)
CSS24
(1)
23:16
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CSS23
(1)
CSS22
(1)
CSS21
(1)
CSS20
(1)
CSS19
(1)
CSS18 CSS17 CSS16
15:8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CSS15 CSS14 CSS13 CSS12 CSS11 CSS10 CSS9 CSS8
7:0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CSS7 CSS6 CSS5 CSS4 CSS3 CSS2 CSS1 CSS0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-0 CSS31:CSS0: Analog Common Scan Select bits
1 = Select ANx for input scan
0 = Skip ANx for input scan
Note 1: This bit is not available on 64-pin devices.
Note 1: In addition to setting the appropriate bits in this register, Class 1 and Class 2 analog inputs must select the
STRIG input as the trigger source if they are to be scanned through the CSSx bits. Refer to the bit
descriptions in the ADCTRGx registers for selecting the STRIG option.
2: If a Class 1 or Class 2 input is included in the scan by setting the CSSx bit to ‘1’ and by setting the
TRGSRCx<4:0> bits to STRIG mode (‘0b11), the user application must ensure that no other triggers are
generated for that input using the RQCNVRT bit in the ADCCON3 register or the hardware input or any
digital filter. Otherwise, the scan behavior is unpredictable.