Datasheet

PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 66 Preliminary  2015 Microchip Technology Inc.
FIGURE 4-5: BOOT AND ALIAS
MEMORY MAP
TABLE 4-1: SFR MEMORY MAP
Physical Memory Map
(1)
0x1FC74000
Sequence/Configuration Space
(3)
0x1FC70000
0x1FC6FF00
Boot Flash 2
0x1FC60000
Reserved 0x1FC54020
Serial Number
(4)
0x1FC54000
Sequence/Configuration Space
(3)
0x1FC50000
0x1FC4FF00
Boot Flash 1
0x1FC40000
Reserved
0x1FC34000
Unused Configuration Space
(5)
0x1FC30000
0x1FC2FF00
Upper Boot Alias
0x1FC20000
Reserved
0x1FC14000
Configuration Space
(2,3)
0x1FC10000
0x1FC0FF00
Lower Boot Alias
0x1FC00000
Note 1: Memory areas are not shown to scale.
2: Memory locations 0x1FC0FF40
through 0x1FC0FFFC are used to
initialize Configuration registers (see
Section 34.0 “Special Features”).
3: Refer toSection 4.1.1 “Boot Flash
Sequence and Configuration
Spaces” for more information.
4: Memory locations 0x1FC54020 and
0x1FC54024 contain a unique device
serial number (see Section 34.0
“Special Features”).
5: This configuration space cannot be
used for executing code in the upper
boot alias.
Peripheral
Virtual Address
Base
Offset
Start
System Bus
(1)
0xBF8F0000
0x0000
Prefetch
0xBF8E0000
0x0000
EBI 0x1000
SQI1 0x2000
USB 0x3000
Crypto 0x5000
RNG 0x6000
CAN1 and CAN2
0xBF880000
0x0000
Ethernet 0x2000
USBCR 0x4000
PORTA-PORTK
0xBF860000
0x0000
Timer1-Timer9
0xBF840000
0x0000
IC1-IC9 0x2000
OC1-OC9 0x4000
ADC 0xB000
Comparator 1, 2 0xC000
I2C1-I2C5
0xBF820000
0x0000
SPI1-SPI6 0x1000
UART1-UART6 0x2000
PMP 0xE000
Interrupt Controller
0xBF810000
0x0000
DMA 0x1000
Configuration
0xBF800000
0x0000
Flash Controller 0x0600
Watchdog Timer 0x0800
Deadman Timer 0x0A00
RTCC 0x0C00
CVREF 0x0E00
Oscillator 0x1200
PPS 0x1400
Note 1: Refer to 4.2 “System Bus Arbitration”
for important legal information.