Datasheet

 2010 - 2015 Microchip Technology Inc. DS00001692C-page 35

USB251xB/xBi

5.3.4 STRETCHING THE SCLK SIGNAL

The hub supports stretching of the SCLK by other devices on the SMBus. However, the hub does not stretch the SCLK.

5.3.5 SMBUS TIMING

The SMBus slave interface complies with the SMBus Specification Revision 1.0 [3]. See Section 2.1, AC Specifications

on page 3 for more information.

5.3.6 BUS RESET SEQUENCE

The SMBus slave interface resets and returns to the idle state upon a START condition followed immediately by a STOP

condition.

5.3.7 SMBUS ALERT RESPONSE ADDRESS

The SMBALERT# signal is not supported by the hub.

5.4 Default Configuration

To put the hub in the default configuration, strap CFG_SEL[1:0] to 00b. This procedure configures the hub to the internal

defaults and enables the strapping options. To place the hub in default configuration with overrides, see Table 5-1 on

page 19 for the list of the options.

The internal default values are used for the registers that are not controlled by strapping option pins. Refer to Section 5.1

on page 19 for the internal default values that are loaded when this option is selected. For a list of strapping option pins,

see Section 5.0, "Initial Interface/Configuration Options", and to configure the strapping pins, see Section 3.3.1 on page

14.

5.5 Reset

The hub experiences the following two resets:

• Hardware reset via the RESET_N pin

• USB bus reset

5.5.1 EXTERNAL HARDWARE RESET_N

A valid hardware reset is defined as assertion of RESET_N for a minimum of 1 s after all power supplies are within

operating range. While reset is asserted, the hub (and its associated external circuitry) consumes less than 500

A of

current from the upstream USB power source.

Assertion of RESET_N causes the following:

1. All downstream ports are disabled, and PRTPWR[x:1] to downstream devices is removed (unless BC_EN[x:1]

is enabled).

2. The PHYs are disabled, and the differential pairs will be in a high-impedance state.

3. All transactions immediately terminate; no states are saved.

4. All internal registers return to the default state (in most cases, 00h).

5. The external crystal oscillator is halted.

6. The PLL is halted.

The hub is operational 500

s after RESET_N is negated. Once operational, the hub will do one of the following, depend-

ing on configuration:

• Read the strapping pins (default configuration with strapping options enabled)

• Read configuration information from the external I

C EEPROM

• Wait for configuration over SMBus.