Datasheet

 2010 - 2015 Microchip Technology Inc. DS00001692C-page 45
USB251xB/xBi
7.2 External Clock
50% duty cycle  10%, 24 MHz  350 ppm, jitter < 100 ps rms.
The external clock is recommended to conform to the signaling level designated in the
JESD76-2 Specification [5] on
1.2 V CMOS Logic.
XTALOUT should be treated as a weak (<1mA) buffer output.
7.2.1 SMBUS INTERFACE
The hub conforms to all voltage, power, and timing characteristics and specifications as set forth in the SMBus 1.0 Spec-
ification [3] for slave-only devices (except as noted in Section 5.3, "SMBus," on page 33.
7.2.2 I
2
C EEPROM
Clock frequency is fixed at 60 kHz  20
7.2.3 USB 2.0
The Microchip hub conforms to all voltage, power, and timing characteristics and specifications as set forth in the USB
2.0 Specification
[1].