Datasheet

1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 1997-2006, Zarlink Semiconductor Inc. All Rights Reserved.
Features
Complete DTMF Receiver
Low power consumption
Internal gain setting amplifier
Adjustable guard time
Central office quality
Power-down mode
Inhibit mode
Backward compatible with MT8870C/MT8870C-1
Applications
Receiver system for British Telecom (BT) or
CEPT Spec (MT8870D-1)
Paging systems
Repeater systems/mobile radio
Credit card systems
Remote control
Personal computers
Telephone answering machine
Description
The MT8870D/MT8870D-1 is a complete DTMF
receiver integrating both the bandsplit filter and digital
decoder functions. The filter section uses switched
capacitor techniques for high and low group filters;
the decoder uses digital counting techniques to detect
and decode all 16 DTMF tone-pairs into a 4-bit code.
October 2006
Ordering Information
MT8870DE 18 Pin PDIP Tubes
MT8870DS 18 Pin SOIC Tubes
MT8870DN 20 Pin SSOP Tubes
MT8870DSR 18 Pin SOIC Tape & Reel
MT8870DNR 20 Pin SSOP Tape & Reel
MT8870DN1 20 Pin SSOP* Tubes
MT8870DE1 18 Pin PDIP* Tubes
MT8870DS1 18 Pin SOIC* Tubes
MT8870DNR1 20 Pin SSOP* Tape & Reel
MT8870DSR1 18 Pin SOIC* Tape & Reel
MT8870DE1-1 18 Pin PDIP* Tubes
MT8870DS1-1 18 Pin SOIC* Tubes
MT8870DSR1-1 18 Pin SOIC* Tape & Reel
*Pb Free Matte Tin
-40°C to +85°C
MT8870D/MT8870D-1
ISO
2
-CMOS Integrated DTMF Receiver
Data Sheet
Figure 1 - Functional Block Diagram
PWDN
IN +
IN -
GS
OSC1 OSC2 St/GT ESt STD TOE
Q1
Q2
Q3
Q4
VDD VSS VRef INH
Bias
Circuit
Dial
Tone
Filter
High Group
Filter
Low Group
Filter
Digital
Detection
Algorithm
Code
Converter
and Latch
St
GT
Steering
Logic
Chip
Power
Chip
Bias
VRef
Buffer
Zero Crossing
Detectors
to all
Chip
Clocks

Summary of content (19 pages)