Specifications

How to Control the Implementation of VHDL
VHDL Reference Manual D-5
Register Type Extensio
n
Require
d
Supporte
d
Extensio
ns
Definition
T-type flip-flop
ü
ü
.clk
.t
.oe
.q
.sp
.sr
.ap
.ar
.pin
clock
toggle input
output enable
flip-flop feedback
synchronous preset
synchronous reset
asynchronous preset
asynchronous reset
pin feedback
L-type latch
ü
ü
.d
.le
.lh
.oe
.q
.pin
data input
latch enable input to a
latch
latch enable (high) input
to a latch
output enable
flip-flop feedback
pin feedback
Gated clock D
flip-flop
ü
ü
.clk or
.ce
.d
.oe
.q
.pin
clock or clock enable
data input
output enable
flip-flop feedback
pin feedback
Pin-to-Pin Design Dot Extensions
Table C-4 shows the dot extensions that are used (and which of those
are required) for pin-to-pin design descriptions. The required dot
extensions are indicated with a check in the Required column.
Table C-4: Dot Extensions for Architecture-independent (pin-to-pin) Designs
Register
Type
Require
d
Allowabl
e
Extensio
ns
Definition
combinational
(no register)
none
.oe
.pin
output
output enable
pin feedback
registered
logic
ü
.clr
.aclr
.set
.aset
.clk
.com
.fb
.pin
synchronous preset
asynchronous preset
synchronous set
asynchronous set
clock
combinational feedback
registered feedback
pin feedback