Specifications

Index
Index-2 VHDL Reference Manual
Combinational logic ................................................................................3-2, C-3
Component statement ...................................................................................6-1
Components .................................................................................................6-2
synthesis advantages..................................................................................6-3
Concurrent
statement........................................................................................... 2-2, 2-7
Conditional logic ...........................................................................................3-8
Conditional signal assignment.........................................................................3-8
Conditional specification............................................................................... 3-15
Configuration statement.................................................................................6-1
Configurations ................................................................................ 2-5, 6-2, 6-4
as parts lists ..............................................................................................6-4
as sockets .................................................................................................6-5
default ......................................................................................................6-1
Constants.............................................................................................. 2-9, 3-3
Constraints...................................................................................................2-1
Conventions
coding..................................................................................................... 3-15
Counter
3-bit example ............................................................................................4-8
Critical attribute.......................................................................................... 4-17
D
Data objects .................................................................................................2-8
Data types ................................................................................................. 2-11
Declaration
variable.....................................................................................................2-8
Declarations ..........................................................................................2-3, A-2
Delta delay................................................................................................. 2-10
Design entity ................................................................................................6-1
Design for synthesis ......................................................................................3-1
Design I/O ...................................................................................................C-1
Design Libraries ..................................................................................... 6-6, 6-8
Design management......................................................................................6-1
Design strategies ..........................................................................................C-1
Device fitting attributes................................................................................ 4-13
Don't-care conditions.....................................................................................4-4
Don't-cares
and enumerated types ................................................................................4-1
Dot extensions.............................................................................. 3-15, C-4, D-2
drawings of............................................................................................... D-6
E
Else condition ............................................................................................. 3-15
Entity ................................................................................................... 2-2, 2-4
Entity/architecture pair ........................................................................... 2-2, 6-1
Enum_encoding ..................................................................................... 3-2, 4-3
Enum_encoding attribute ...................................................................... 4-2, 4-18
Enumerated type
for state machines.................................................................................... 3-25
Enumerated types ...................................................................2-13, 3-2, 4-1, 4-2
Enumerated types:default encoding.................................................................4-2