Specifications

Doc Number: VIS-ANA-VER-01001-9002
Date: 27 May 2004
Issue: 5.0
Page: 64 of 80
Author: J. Delgadillo
Controls Preliminary Design Report Issue 5.doc
Appendix A - Mount Control Unit
The MCU will be used to show compliance to the pointing and tracking requirements of the
mount, per AD01 11.1.3 spec. Following is a brief description of the MCU hardware and its
modes of operation.
Refer to the following representative photograph and block diagram of the Mount Control
Unit.
The MCU power supply is a 250W switching power supply with universal input. It supplies
logic power (+5, +/- 15 Vdc) to the off-the-shelf motherboard and to the floppy and hard
drive of the MCU.
The Motherboard is an off-the-shelf Pentium processor. System software is done on a real-
time operating system (QNX) in C language. The motherboard has a built in IDE control
function, which controls the Floppy Drive and the Hard Drive.
The Floppy Drive is a standard 3.5” drive that is used for backing-up system parameters.
The Hard Drive is a 16 Meg, solid-state, flash disc drive where the system software program
and database resides.
The local display is a 250mm colour LCD that uses TFT technology.
The speaker sounds an audible alarm whenever there are new faults present. Additionally,
contact closure status is available for summary and unacknowledged faults.
The MCU Interface board provides the interface between the MCU and the rest of the control
system equipment. It provides the serial link to the AZ/ALT PDU and to the CASS PDU.
This link is used for gathering of system faults & issuing of position commands to the PDUs
Central Control Units.
As mentioned earlier, the MCU will be used to show compliance to the pointing and tracking
requirements. The MCU Open Position Loop Bode plot is the position filtering that the MCU
implements. The break frequencies are done digitally, through parameters in the MCU.
The LAG1 break frequency determines whether the position loop is a Type I or Type II. For
this demanding application a Type II position loop is warranted, therefore, the LAG1 break
frequency is disabled (taken to 0 Hz).