Service manual

and AC coupling is via C87 and C93.

The aux send signal can be sent to the solo busses via CMOS switch IC12 which is controlled by

NAND gate IC13. Sections A and B of the NAND gate form a bi-stable flip flop which is trig-

gered by switch SW15 and capacitor C64. When a solo is first enabled capacitor C62 creates a

negative going pulse which is inverted and buffered by section C of IC13. This will clear any other

solos but is prevented from self clearing by the logic low charge held on C64; once this capacitor

has charged to a logic high the solo can be cleared by the solo clear bus via section D of IC9. If

the solo switch is held down capacitor C63 dis-charges and resets the flip flop; the solo is now

held on by diode D42 until the switch is released. Additional FETs Q13, Q14 and Q15 are used

to connect or disconnect the entire module from the solo busses. If any solo is active on the

module transistors Q17 and Q18 switch the FETs on.

The summed group bus signal is fed to the insert send circuit which is formed by the differential

output amplifier IC16. Output symmetry is adjusted by pre-set VR7 and high frequency stability

into any load is assured by filter capacitors C86, C85, C86 and C96. Further filtering is achieved

by T filters in the console frame and AC coupling is via C83 and C95.

The insert return circuit is fed via T filters in the frame to the differential amplifier IC18. Pre-set

VR8 provides CMR adjustment and capacitors C98, C99, C100 and C101 provide additional high

frequency filtering; C102 and C103 provide AC coupling.

The insert is switched in or out of circuit by switch SW18 and the signal is then buffered by

amplifier IC19 and split to fed both pre fade mute and VCA circuits. The VCA IC20 is controlled

from the fader RV6 and buffer amplifier IC22. Pre-set VR10 sets the nominal VCA gain to +10dB

and VR9 trims the distortion to a minimum. The VCA can also be controlled from the grand

master vca fader busses which are connected via switches SW30 and SW31.

FETs Q19, Q20, Q21 and Q22 create the mute circuit in conjunction with amplifiers IC19 and

IC21. Control of the mute and mute indicator is achieved via invertor IC24 which forms a bi-

stable flip flop triggered from switch SW20 and capacitor C141. The indicator will illuminate at

half brightness if an automute master on the comms module has activated the mute. The indicator

will illuminate at full brightness if the mute switch is pressed to activate the mute or the automa-

tion recalls a mute via R236. The audio group is assigned to auto mute groups by switches SW21

to SW29.

The group output is fed to a differential output amplifier IC23. Output symmetry is adjusted by

pre-set VR11 and high frequency stability into any load is assured by filter capacitors C133,

C134, C135 and C137. Further filtering is achieved by T filters in the console frame and AC

coupling is via C132 and C136.

The group output can also be routed to the master busses via the pan potentiometer RV20, pan

buffer amplifier IC25 and FETs Q27, Q28, Q29 and Q30. The FETs are controlled by switch

SW19.

The group signal can be sent to the solo busses via FETs Q31, Q32 and Q33. These are control-

led by NAND gate IC26, invertor IC24 and transistor Q35. Sections A and D of the NAND gate

form a bi-stable flip flop which is triggered by switch SW32 and capacitor C155. When a solo is

first enabled capacitor C152 creates a negative going pulse which is inverted and buffered by

section B of IC26. This will clear any other solos but is prevented from self clearing by the logic