Product data

MFRC631 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.3 — 4 February 2014
227433 103 of 120
NXP Semiconductors
MFRC631
High performance ISO/IEC 14443 A/B reader solution
13.1 Timing characteristics
Remark: To send more bytes in one data stream the NSS signal must be LOW during the
send process. To send more than one data stream the NSS signal must be HIGH between
each data stream.
Fig 31. Pin RX input voltage
001aak012
VMID
0 V
V
mod
V
i(p-p)(max)
V
i(p-p)(min)
13.56 MHz
carrier
Table 195. SPI timing characteristics
Symbol Parameter Conditions Min Typ Max Unit
t
SCKL
SCK LOW time 50 - - ns
t
SCKH
SCK HIGH time 50 - - ns
t
h(SCKH-D)
SCK HIGH to data input hold
time
SCK to changing MOSI 25 - - ns
t
su(D-SCKH)
data input to SCK HIGH
set-up time
changing MOSI to SCK 25 - - ns
t
h(SCKL-Q)
SCK LOW to data output
hold time
SCK to changing MISO - - 25 ns
t
(SCKL-NSSH)
SCK LOW to NSS HIGH
time
0--ns
t
NSSH
NSS HIGH time before communication 50 - - ns
Table 196. I
2
C-bus timing in fast mode and fast mode plus
Symbol Parameter Conditions Fast mode Fast mode
Plus
Unit
Min Max Min Max
f
SCL
SCL clock frequency 0 400 0 1000 kHz
t
HD;STA
hold time (repeated) START
condition
after this period,
the first clock pulse
is generated
600 - 260 - ns
t
SU;STA
set-up time for a repeated
START condition
600 - 260 - ns
t
SU;STO
set-up time for STOP condition 600 - 260 - ns
t
LOW
LOW period of the SCL clock 1300 - 500 - ns
t
HIGH
HIGH period of the SCL clock 600 - 260 - ns
t
HD;DAT
data hold time 0 900 - 450 ns