Product data

MFRC631 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.3 — 4 February 2014
227433 43 of 120
NXP Semiconductors
MFRC631
High performance ISO/IEC 14443 A/B reader solution
I
2
C_SAM_Address: The I
2
C SAM Address is always defined by the EEPROM content.
The Register Set Protocol (RSP) Area contains settings for the TX registers (16 bytes)
and for the RX registers (8 bytes).
TxCrcPreset: The data bits are send by the analog module and are automatically
extended by a CRC.
Table 29. Interface byte
Bit 7 6 5 4 3 2 1 0
I
2
C_HSP - - I2C_Address Boundary Scan Host
access rights r/w RFU RFU r/w r/w r/w
Table 30. Interface bits
Bit Symbol Description
7 I
2
C_HSP when cleared, the high speed mode is used
when set, the high speed+ mode is used (default)
6, 5 RFU -
4I
2
C_Address when cleared, the pins are used (default)
when set, the EEPROM is used
3 Boundary
Scan
when cleared, the boundary scan interface is ON (default)
when set, the boundary scan is OFF
2 to 0 Host 000b - RS232
001b - I
2
C
010b - SPI
011b - I
2
CL
1xxb - pin selection
Table 31. Tx and Rx arrangements in the register set protocol area
Section
Section 4 TX Tx0 Tx1 TX2 Tx3
Section 4 TX Tx4 Tx5 TX6 TX7
Section 4 Rx RX0 RX1 RX2 RX3 RX4 RX5 RX6 RX7
Section 4 Rx RX8 RX9 RX10 RX11 RX12 RX13 RX14 RX15