Product data

MFRC631 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.3 — 4 February 2014
227433 65 of 120
NXP Semiconductors
MFRC631
High performance ISO/IEC 14443 A/B reader solution
9.6 Contactless interface configuration registers
9.6.1 Error
Error register.
Table 59. IRQ1EN register (address 09h);
Bit 7 6 5 4 3 2 1 0
Symbol IrqPushPull IrqPinEn LPCD_IrqEn Timer4IrqEn Timer3IrqEn Timer2IrqE
n
Timer1IrqEn Timer0IrqEn
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r/w r/w r/w r/w r/w r/w r/w r/w
Table 60. IRQ1EN bits
Bit Symbol Description
7 IrqPushPull Set to 1 the IRQ-pin acts as PushPull pin, otherwise it acts as
OpenDrain pin
6 IrqPinEN Set to logic 1, it allows the global interrupt request (indicated by the bit
GlobalIrq) to be propagated to the interrupt pin
5 LPCD_IrqEN Set to logic 1, it allows the LPCDinterrupt request (indicated by the bit
LPCDIrq) to be propagated to the GlobalIrq
4 Timer4IRqEn Set to logic 1, it allows the Timer4 interrupt request (indicated by the bit
Timer4Irq) to be propagated to the GlobalIrq
3 Timer3IrqEn Set to logic 1, it allows the Timer3 interrupt request (indicated by the bit
Timer3tIrq) to be propagated to the GlobalIrq
2 Timer2IrqEn Set to logic 1, it allows the Timer2 interrupt request (indicated by the bit
Timer2Irq) to be propagated to the GlobalIrq
1 Timer1IrqEn Set to logic 1, it allows the Timer1 interrupt request (indicated by the bit
Timer1Irq) to be propagated to the GlobalIrq
0 Timer0IrqEn Set to logic 1, it allows the Timer0 interrupt request (indicated by the bit
Timer0Irq) to be propagated to the GlobalIrq
Table 61. Error register (address 0Ah)
Bit 7 6 5 4 3 2 1 0
Symbol EE_Err FiFoWrErr FIFOOvl MinFrameErr NoDataErr CollDet ProtErr IntegErr
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dy dy dy dy dy dy dy dy