Product data

MFRC631 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.3 — 4 February 2014
227433 69 of 120
NXP Semiconductors
MFRC631
High performance ISO/IEC 14443 A/B reader solution
9.6.4 RxColl
Receiver collision register.
Table 67. RxColl register (address 0Dh);
Bit 7 6 5 4 3 2 1 0
Symbol CollPosValid CollPos
Access
rights
rr
Table 68. RxColl bits
Bit Symbol Description
7 CollPos
Valid
If set to 1, the value of CollPos is valid. Otherwise no collision is detected or
the position of the collision is out of the range of bits CollPos.
6 to 0 CollPos These bits show the bit position of the first detected collision in a received
frame (only data bits are interpreted). CollPos can only be displayed for the
first 8 bytes of a data stream.
Example:
00h indicates a bit collision in the 1st bit
01h indicates a bit collision in the 2nd bit
08h indicates a bit collision in the 9th bit (1st bit of 2nd byte)
3Fh indicates a bit collision in the 64th bit (8th bit of the 8th byte)
These bits shall only be interpreted in Passive communication mode at 106
kbit/s or ISO/IEC 14443A/MIFARE reader /writer mode if bit CollPosValid is
set.
Note: If RxBitCtrl.RxAlign is set to a value different to 0, this value is included
in the CollPos.
Example: RxAlign = 4h, a collision occurs in the 4th received bit (which is the
last bit of that UID byte). The CollPos = 7h in this case.