Product data

MFRC631 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.3 — 4 February 2014
227433 73 of 120
NXP Semiconductors
MFRC631
High performance ISO/IEC 14443 A/B reader solution
9.7.2.6 T1ReloadHi
High byte (MSB) reload value of the Timer1.
9.7.2.7 T1ReloadLo
Low byte (LSB) reload value of the Timer1.
Table 82. T1Control bits
Bit Symbol Description
7 T1StopRx If set, the timer stops after receiving the first 4 bits. If cleared, the timer
is not stopped automatically.
Note: If LFO trimming is selected by T1start, this bit has no effect.
6- RFU
5 to 4 T1Start 00b: The timer is not started automatically
01b: The timer starts automatically at the end of the transmission
10b: Timer is used for LFO trimming without underflow (Start/Stop on
PosEdge)
11b: Timer is used for LFO trimming with underflow (Start/Stop on
PosEdge)
3 T1AutoRestart Set to logic 1, the timer automatically restarts its countdown from
T1ReloadValue, after the counter value has reached the value zero.
Set to logic 0 the timer decrements to zero and stops.
The bit Timer1IRq is set to logic 1 when the timer underflows.
2- RFU
1 to 0 T1Clk 00b: The timer input clock is 13.56 MHz
01b: The timer input clock is 211,875 kHz.
10b: The timer input clock is an underflow of Timer0
11b: The timer input clock is an underflow of Timer2
Table 83. T0ReloadHi register (address 15h)
Bit 7 6 5 4 3 2 1 0
Symbol T1ReloadHi
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Table 84. T1ReloadHi bits
Bit Symbol Description
7 to 0 T1ReloadHi Defines the high byte reload value of the Timer 1. With the start event
the timer loads the value of the T1ReloadValHi and T1ReloadValLo.
Changing this register affects the Timer only at the next start event.
Table 85. T1ReloadLo register (address 16h)
Bit 7 6 5 4 3 2 1 0
Symbol T1ReloadLo
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