Operating instructions
TRIGGER
GENERATOR
The
Trigger
Generator
provides
a stable
crt
display by
starting
each
sweep
at
the
same
point
on
the
waveform
.
Circuitry
is
included
for
selection
of
trigger-mode,
coupling,
and
source
.
The
output
of
the
Trigger
Generator
is
a
fast-rise
gate
which
enables
the
Sweep
Generator
.
SWEEPGENERATOR
The
sweep
sawtooth
signal
is
initiated
when
the
Trigger
Generator
output
is
applied
to
the
Sweep
Generator
.
The
rate
of
change
(slope)
of
the
sawtooth
signal
is
determined
by
the
TIME/DIV
switch
setting
.
The
sawtooth
signal
provides
horizontal deflection
for
the
mainframe
(oscilloscope)
and
is
used by
the
Pickoff
Amplifier
and
the
Delay
Gate
Generator
in
the
71387
.
The
Sweep
Generator
also
generates
a
Sweep
Gate
pulse
which
unblanks
the
mainframe
crt
.
PICKOFF
AMPLIFIER
AND
DELAY
GATE
GENERATOR
The
Pickoff
Amplifier
and
Delay
Gate
Generator
circuits
produce
a
delay
gate
when
the
sawtooth
signal
from
the
sweep
generator
reaches
the
level
set
by
the
ACQUIRE-
STOP
DELAY
control
.
The
ACQUIRE-STOP
DELAY
control
TAILED
This
section of
the
manual
describes
the
circuitry
used
in
the
71387
Time-Base
.
The
description
beginswith
a
discussion
of
the
instrument,
using
the
block
diagram
shown
in
Figure
3-1
.
Next,
each
circuit
is
described
in
detail
with
a
block
diagram
provided
to
show
the
major
interconnections
between
circuits,
and
the
relationship of the
front-panel
controls to
each
circuit
.
Detailed
schematic
diagrams
of
each
circuit
are
located
in
the
diagrams
foldout
section
at
the
back
of
this
manual
.
Refer
to
these
diagrams
throughout
the
following
discussions
for
specific
electrical
values
and
relationships
.
LOCK
DIAGRAM
DESCRIPTION
The
following
discussion
is
provided
to aid
in
understanding
the
overall
concept
of
the
7B87
beforethe
individual
circuits
are
discussed
in
detail
.
A
basic block
diagram
is
shown
in
Figure
3-1
.
The
numbered
diamond
in
each
block
refers
to the
corresponding
circuit
diagram
at
the
rear
of
this
manual
.
determines
where
the
intensified
zone
ends
.
The
Delay
Gate
signal
enables
the
companion
delayed
time-base
unit
.
LOGIC
`The
Logic
circuit
determines
the
acquire
mode
(acquire
single-shot,
AQS
;
or
acquire
repetitive,
AQR)
of
the
71387
.
The
71387
can
operate
independently
or as a
delayed
time
base
.
The
Logic
circuit
also
determines
the
trigger
mode
and
generates
the
holdoff signal
for
the
mainframe
DIGITAL
VOLTMETER
The
Digital
Voltmeter
circuit
converts
the
delay
comparison
voltage,
from
the
ACQUIRE-STOP
DELAY
control,
to
a calibrated
delay
time
readout
on
the
crt
.
The
readout
indicates
the
time
between
the
start
of
the
sweep
and
the
end
of
the
intensified
zone
.
CLOCK
GENERATOR
The
Clock
Generator
produces
three
signals
for
the
mainframe
:
(1)
the
Clock
pulse,
(2)
the
channel
1
Row
Data
for
the
7854
mainframe,
and
(3)
the
Aux
Z-Axis
signal
which
intensifies
the
display
.
CRI
'TI
N
Section
3---7887
The
operation
of
circuits
unique
to this
instrument
is
described
in
detail
in
this
discussion
.
Circuits
commonly
used
in
the
electronics
industry
are not
described
in
detail
.
The
following
circuit
analysis,
with
supporting
illustrations,
names
the
individual
stages
and
shows
how
they
are
connected
to
form
major
circuits
.
These
illustrations
show
the inputs
and
outputs
for
each
circuit
and
the
relationship
of
the
front-panel
controls
to the
individual
stages
.
The
detailed
circuit
diagrams
from
which
the
illustrations
are
derived
are
shown
in
the
Diagrams
section
.